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ARM: dts: r8a7790: Add clocks for CA7 CPU cores

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Currently only the CPU cores in the CA15 cluster have clocks properties.
Add the missing clocks properties for the CPU cores in the CA7 cluster
to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2017-10-12 11:35:11 +02:00 committed by Simon Horman
parent aa4c2fdf49
commit aea0089ae8
1 changed files with 4 additions and 0 deletions
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4
arch/arm/boot/dts/r8a7790.dtsi
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@ -105,6 +105,7 @@ cpu4: cpu@100 {
compatible = "arm,cortex-a7";
reg = <0x100>;
clock-frequency = <780000000>;
clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
next-level-cache = <&L2_CA7>;
capacity-dmips-mhz = <539>;
@ -115,6 +116,7 @@ cpu5: cpu@101 {
compatible = "arm,cortex-a7";
reg = <0x101>;
clock-frequency = <780000000>;
clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
next-level-cache = <&L2_CA7>;
capacity-dmips-mhz = <539>;
@ -125,6 +127,7 @@ cpu6: cpu@102 {
compatible = "arm,cortex-a7";
reg = <0x102>;
clock-frequency = <780000000>;
clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
next-level-cache = <&L2_CA7>;
capacity-dmips-mhz = <539>;
@ -135,6 +138,7 @@ cpu7: cpu@103 {
compatible = "arm,cortex-a7";
reg = <0x103>;
clock-frequency = <780000000>;
clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
next-level-cache = <&L2_CA7>;
capacity-dmips-mhz = <539>;