This works identically to imx6sx-tempmon on both imx6ul and imx6ull.
It just needs to be defined in dts.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On imx6sx accessing OCOTP directly is wrong because the ocotp clock
needs to be enabled first. Use the nvmem-cells binding instead.
This requirement does not apply to older imx6qdl chips because there the
ocotp access clock (clk_ipg_s) is always enabled.
This is visible by comparing the "System Clocks, Gating, and Override"
tables (OCOTP rows) in the 6DQ and 6SX manuals:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6SXRM.pdfhttp://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
This happens to work right now because the ocotp clock might be enabled
for some other reason. In particular the it might be enabled from the
bootloader and it only gets disabled late during boot in
clk_disable_unused, after imx-thermal has completed probing.
If imx-thermal is compiled as a module then the system can hang on
probe.
Reported-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The container node in the iomuxc node is no longer necessary and causes
pinctl errors on the Ventana boards with analog video capture
since aa12693e41:
pinctrl core: initialized pinctrl subsystem
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/adv7180grp
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/ipu2_csi1grp
imx6q-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver
imx6q-pinctrl 20e0000.iomuxc: function 'iomuxc' not supported
imx6q-pinctrl 20e0000.iomuxc: invalid function iomuxc in map table
imx6q-pinctrl 20e0000.iomuxc: function 'iomuxc' not supported
imx6q-pinctrl 20e0000.iomuxc: invalid function iomuxc in map table
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Latest wandboard hardware revision is revd1, which brings the following
new features:
- PFUZE100 PMIC
- AR8035 Ethernet PHY
- Upgrade Wifi/BT chip to BCM4339/BCM43430.
Add support for the mx6, mx6dl and mx6qp revd1 variants.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
By default, the lcdif_pre_sel mux is switched to the pll3_pfd1_540m PFD
source. If this mux is allowed to propagate rate changes to its parent,
setting the LCDIF pixel clock rate to 9 MHz, as required by the LCD
panel, will cause the pll3_pfd1_540m PFD to be switched away from its
nominal rate to 288 MHz.
This has no negative side effects, as there are no other children to
this PFD. Still, to avoid surprises, it might be preferrable to switch
to the designated video PLL (pll5_video_div) as clock source for the
LCDIF pixel clock.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx-i2c driver supports automatic bus recovery via the GPIO
function of the I2C pins. Enable this functionality for the Ka-Ro
electronics TX53 modules.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Don't rely on the padctl settings established by the boot loader, but
explicitly specify the padctl values in DTB. This is also necessary to
be able to use the DTB files from the Linux kernel for future U-Boot
versions that support HW configuration via DTB.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As the DS1339 driver now supports enabling the trickle charge feature
via DTB, add the appropriate properties to utilize this feature.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The display, that incorporates this touchpanel is obsolete and won't
be supported any more.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.
The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current GPL only licensing on the dts files makes it very
impractical for other software components licensed under another
license.
In order to make it easier for them to reuse our device trees,
relicense our dts files first under a GPL/X11 dual-license.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As the DS1339 driver now supports enabling the trickle charge feature
via DTB, add the appropriate properties to utilize this feature.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vdd10_lcd and vcc18_lcd regulators need to be enabled for HDMI output
to work, so add 'regulator-always-on', just as is done in rk3288-firefly.dtsi.
Also enable i2c5, the hdmi block and configure the correc cec pin.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The CEC line can be routed to two possible pins. Define those pins.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The dw-hdmi block needs the cec clk for the rk3288. Add it.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
When HYP code runs into branch profiling code, it attempts to jump to
unmapped memory, causing a HYP Panic.
Disable the branch profiling for code designed to run at HYP mode.
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
When a exception is trapped to EL2, hardware uses ELR_ELx to hold
the current fault instruction address. If KVM wants to inject a
abort to 32 bit guest, it needs to set the LR register for the
guest to emulate this abort happened in the guest. Because ARM32
architecture is pipelined execution, so the LR value has an offset to
the fault instruction address.
The offsets applied to Link value for exceptions as shown below,
which should be added for the ARM32 link register(LR).
Table taken from ARMv8 ARM DDI0487B-B, table G1-10:
Exception Offset, for PE state of:
A32 T32
Undefined Instruction +4 +2
Prefetch Abort +4 +4
Data Abort +8 +8
IRQ or FIQ +4 +4
[ Removed unused variables in inject_abt to avoid compile warnings.
-- Christoffer ]
Cc: <stable@vger.kernel.org>
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
Tested-by: Haibin Zhang <zhanghaibin7@huawei.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Pull ARM fixes from Russell King:
"Three fixes this time around:
- ensure sparse realises that we're building for a 32-bit arch on
64-bit hosts.
- use the correct instruction for semihosting on v7m (nommu) CPUs.
- reserve address 0 to prevent the first page of memory being used on
nommu systems"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8704/1: semihosting: use proper instruction on v7m processors
ARM: 8701/1: fix sparse flags for build on 64bit machines
ARM: 8700/1: nommu: always reserve address 0 away
Two fixes, one for the A31 DRM binding, and one for a missing regulator on
the pine MMC controller.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZ6axFAAoJEBx+YmzsjxAgRPQQAL8SNIbznqcV1ncW1SXBH/hg
W1UCfclJfCJ1nrctsfXIgDpIJAGjVR+PEh8kBHgyqknqLJ6bQpJOqfHzSZk+SWF4
1NuosdxLMW9V9wrwzNUUYD6Jh3VoJAgKDcWBPeY9eUvvLq6wnzXmSXPBtTUlXuNp
XcXoT7TCSlUZ0rvJKPe2ON+BH1hjYhNnHs07TN2x2lbYQMbEcLLzqBOyfxESzQ5w
hAb8gpJhGSDAk2pJXtyviSNokx5fqSePnKmfPNG42QHXq+cvt6aCcosqZ9u3OuAx
eNTVTZPlvnQ/GfjEouG4NTjYbv5cXdN8itqaSypMeN+8xpOJ/mFDa8K/vzyzF2Kr
6svpe4SC0YB6z4YtKFLR0Q6a/MlgMNq02WW5l+oq8e44pwyPRYFeTNNP8yD9ZO0k
xlhgNyo+/KIXGx6XBga27x3IyaWopGslLK/UjG4El0jOAPISiuZcbF6GCsFht7dk
YSVEVQ842v2iX817kaDy1zGTOy0b9j9/AOu6ctZlsP9XM9YaMxi7pFrb+UFu6FSJ
yRR8TNZjjrSMsuDc8yrbH0/nWcgkmQtYXa2iQ4/2ILlW63zrm2yM7w8CKygyZ25D
NhuK/yQ+PEsKYDAJ3s3T3hUbirAmQx3KUmv6Jr7UUPaj6V5a62Jl/pt5+oSlGQm7
EBkvmIV+XXwmqng7Y/WF
=Cvge
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Pull "Allwinner fixes for 4.14" from Maxime Ripard:
Two fixes, one for the A31 DRM binding, and one for a missing regulator on
the pine MMC controller.
* tag 'sunxi-fixes-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun6i: Fix endpoint IDs in second display pipeline
arm64: allwinner: a64: pine64: Use dcdc1 regulator for mmc0
Without the STDMAC clock enabled, the USB 2.0 hosts do not work.
This clock must be explicitly listed in the "clocks" property because
it is independent of the other clocks.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Banana Pi M2 Ultra board features two USB host ports, connected to the
two USB host ports on the SoC.
Add support for them.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA
and USB) is controlled via a GPIO.
Add regulator node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
On newer revisions of the Banana Pi M2 Ultra boards, the 5V power output
(used by HDMI, SATA and USB) is controller via a GPIO.
Add the regulator node for it.
Older revisions just have the 5V power output always on, and the GPIO is
reserved on these boards. So it won't affect the older revisions.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the host ports in the DTSI file.
The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlng604RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPLCQ//cPpaHUB7wW0jKLVX3J0cUQt5lWjNv/16
3W/ap6TPIwNmkdeF8YySt22exHNXtgPjd6XuIK5MPfx5B/4Z1llEjet4kjb01Jmw
j2A7QeQln0lqWfAXux4Rw7G7bnmN8Zsph8BYKz5K2vYfAca1Y+xhlNPRRSmsD7Wx
+zHR87eKQ+WEL8x+7iBnw5tgqKvdKVyqmkKHm1y/Hr4DqewuOTgvVZJ6FnxG6hGA
PeNnQrM1GOLGxU28tlROuGnaUTT1knBQcoJy2lWwxx4on2S/XzAMcetEq8e0RR2C
0WOotWAQPSPicncr17Gmx7kNewcAwJ+bnNmbkXsuIsGksOkcil+Q+H0Y5gzImYQu
XBRbuhLwqrFxqSfOyQIppFa0w5KGF7Mm9zTyjaO9DshpTny9gwsxJK2r0rh6ucbq
Rt3WuJmJwdMZ9XT8iBRJonkGle4Q6dmtuHu0pqlJzjclfLwvLUoxNZwc0k0e5g2f
a/PGNUj0rqSo6AgUfjlvQU8M/f3T9X0bRIIE7zWbIo8P0qxJPUDBnz+CHHADVD4G
Yn/rM1omIfcMCIOKiY3l53Nclr6Nld2U1Mg4tMiG32AkE8lefU4q1dlfUblO/Vrw
wAAoG54IMH4ekv5ljSeAKR0cB+a6PzlLwZivwZaN9/mUuMBRYlFSQEhRD1KdhZbR
L/c9isoMAqk=
=xWf5
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "device tree changes for omaps for v4.15 merge window" from Tony Lindgren:
Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
* tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: omap3: Replace deprecated mcp prefix
ARM: dts: dra7-evm: Move pcie RC node to common file
ARM: dts: omap5: Increase max-voltage of pbias regulator
ARM: dts: dra7: Increase max-voltage of pbias regulator
ARM: dts: am43xx-epos-evm: Add default pinmux for unused pins
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for usb2_phy1 and usb2_phy2
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for uart0
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for matrix_keypad0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for mmc1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for pixcir_ts
ARM: dts: am43xx-epos-evm: Add sleep pinmux for gpmc
ARM: dts: am43xx-epos-evm: Add sleep pinmux for ecap0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for qspi1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for spi0 and spi1
ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
ARM: dts: Configure earlycon for omap5-common
ARM: dts: Configure earlycon for pandaboard
ARM: dts: Configure earlycon for n8x0
ARM: dts: omap3-evm: Add DSS {vdds_dsi,vdda_video}-supply references
ARM: dts: omap3: Add Sharp LS037V7DW01 'envdd' supply
...
dts files fixed up to contain the necessary data for basic resources, we
can drop the related platform data.
Note that this branch depends on the "omap-for-v4.15/fixes-dt-signed"
branch and the patches with dependencies are based on a merge with that
branch.
These patches first ensure things keep working for the legacy "ti,hwmods"
property when we start making it optional, then adds a minimal TI sysc
interconnect target device driver to handle the new generic "ti,sysc"
compatible property. And then we can finally drop the legacy platform
data for IRQ, DMA and IO resources as seen in the diffstats.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlnpH4MRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOflw//a6XK67MvvBAni0jUrEvVsXkIszk/V8bm
2rTnBT+8mdH7QjH2QQrvtS5XX7uVSY27Pay9yiudhB/ZvHdih4SguSZB2JC9nMyf
uAJAk5JUXvGdlj7NjMhIEEQZHzb2GYXlwNWKW8201FgjTrUs/miRLb0+bBi0+a5O
02FFYb45Gcv0xQlwcG7yAWzjCpy5a0Vd75M/Q+aGeNXeZagrH1bLtc6dNY59RPKs
0D51XGQNHyVDITArBms9Q6O+MyIHnRcL3zdKRGrWMhNXBwP5jwE6EE1Jnmcsge9m
vPSdCpRlPQPPhBgLKAqZfHKXEpaVQfPjq7vp/ZFUiBSMuyNb2SP7YCOnh06cZwjZ
hz4eMIQVvABBNvGMmg934hWP7OHSQkgxn5+zPo5o3gYvv+GvrKRUmxfaDpUoX4Ld
oLUUcCfb4r0YAr5S+iCXaGtEdYhXdL1xzndSKFNlf+tx95BxbsfQ4u7pITMjLTAB
vXBJASquuLQYRumWXPnMUDkKuTEJPq/ndSIOfdSU+09jFKGwkv/2C15YO8uZsH6m
fWSUEGyD+c9hbnYDNE5mXkB4OeP7aGeCJC0RaucHXOeNNJJPRgNXPeHJA2aXYam+
ml28jwoPRoOCE+SjGV0RtxjDAjMuc3Xknq6xq5GmHp8peHdeG+GaD4qdJThlcgRl
yLnaNnEoZsI=
=UKzm
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "more soc changes for omaps for v4.15 merge window" from Tony Lindgren:
Drop omap legacy platform data for IRQ, DMA and IO resources. With the
dts files fixed up to contain the necessary data for basic resources, we
can drop the related platform data.
Note that this branch depends on the "omap-for-v4.15/fixes-dt-signed"
branch and the patches with dependencies are based on a merge with that
branch.
These patches first ensure things keep working for the legacy "ti,hwmods"
property when we start making it optional, then adds a minimal TI sysc
interconnect target device driver to handle the new generic "ti,sysc"
compatible property. And then we can finally drop the legacy platform
data for IRQ, DMA and IO resources as seen in the diffstats.
* tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits)
bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove
bus: ti-sysc: mark PM functions as __maybe_unused
ARM: OMAP2+: omap_device: fix error return code in omap_device_copy_resources()
ARM: OMAP2+: Drop legacy struct omap_hwmod_addr_space
ARM: OMAP2+: Drop omap_hwmod_dma_info
ARM: OMAP2+: Drop omap_hwmod_irq_info
ARM: OMAP4: Remove legacy IRQ for PRM
ARM: OMAP3: Remove legacy IRQ for PRM
bus: ti-sysc: Add minimal TI sysc interconnect target driver
ARM: OMAP2+: Populate legacy resources for dma and smartreflex
ARM: OMAP2+: Parse module IO range from dts for legacy "ti,hwmods" support
ARM: dts: Configure SmartReflex only to idle the interconnect target module
ARM: dts: Add nodes for missing omap4 interconnect target modules
dt-bindings: bus: Minimal TI sysc interconnect target module binding
ARM: dts: Add missing hwmod related properties for dra7
ARM: dts: Add missing hwmod related nodes for am33xx
ARM: dts: Add missing dma hwmod property for omap5
ARM: dts: Add missing wdt3 node for omap4
ARM: dts: Add missing hsi node for omap4
ARM: dts: Add missing onewire node for omap4
...
Pull "non-urgent device tree fixes for omaps for v4.15 merge window"
from Tony Lindgren
Non-urgent device tree fixes for omaps that can all wait for v4.15
merge window.
Turns out that we have many devices working just because we have
the legacy platform data still around. This is mostly an issue
for omap4, other SoCs just have minimal fixes needed.
As many of the missing device tree nodes and properties are for
devices that have no drivers in the mainline kernel, such as
slimbus, iss, mcasp, aess, fdif and gpu, we might as well start
using the new "ti,sysc" interconnect target module binding for
them so we can get the devices with no child device drivers idled.
This also makes it possible to drop unnecessary platform data
in later patches.
* tag 'omap-for-v4.15/fixes-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Fix typo for omap4 mcasp rx path
ARM: dts: Configure SmartReflex only to idle the interconnect target module
ARM: dts: Add nodes for missing omap4 interconnect target modules
dt-bindings: bus: Minimal TI sysc interconnect target module binding
ARM: dts: Add missing hwmod related properties for dra7
ARM: dts: Add missing hwmod related nodes for am33xx
ARM: dts: Add missing dma hwmod property for omap5
ARM: dts: Add missing wdt3 node for omap4
ARM: dts: Add missing hsi node for omap4
ARM: dts: Add missing onewire node for omap4
ARM: dts: Add missing smartreflex node and binding for omap4
ARM: dts: Add missing hwmods property for omap4 dma
ARM: dts: Add missing properties for omap4 control modules
ARM: dts: Configure pmu without interrupt for omap4430
ARM: dts: Add missing dma hwmods property for omap3
Pull "Rockchip dts32 updates for 4.15 part1" from Heiko Stübner:
One new board the Vyasa from Amarula Solutions using a rk3288
and core lvds node for the newly added driver+binding.
Also bindings + nodes for the Mali-Utgard GPUs found on some
Rockchip socs like rk3036 and rk3188. With the recently revived
Lima project they can even render a red triangle to a png file.
* tag 'v4.15-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Enable thermal on rk3288-vyasa board
ARM: dts: rockchip: fix mali400 ppmmu interrupt names
ARM: dts: rockchip: Enable mali GPU node on rk3288-vyasa
ARM: dts: rockchip: enable gpu on rk3188-radxarock
ARM: dts: rockchip: add gpu nodes on rk3066/rk3188
ARM: dts: rockchip: add rk322x gpu node
ARM: dts: rockchip: enable the gpu on rk3036-kylin boards
ARM: dts: rockchip: add rk3036 gpu node
dt-bindings: gpu: mali-utgard: add optional power-domain reference
dt-bindings: gpu: mali-utgard: add optional supply regulator
dt-bindings: gpu: mali-utgard: Add Rockchip Utgard Malis
ARM: dts: rockchip: enable vops and hdmi output on rk3288-vyasa
ARM: dts: rockchip: Add rk3288 vyasa board
dt-bindings: Add vendor prefix for Amarula Solutions
ARM: dts: rockchip: add LVDS node for rk3288
Pull "STM32 DT updates for v4.15, round 1" from Alexandre Torgue:
Highlights:
----------
-Add I2C1 support on STM32F746 SoC
-Enable I2C1 on STM32F746 eval board
-Add Timers support on STM32F746 SoC
-Add USB HS and FS supports on STM32F746 Soc
-Enable USB HS on STM32F746 disco and eval boards
-Enable USB FS en STM32F746 disco board
-Add Vrefbuf to STM32H743 SoC
-Add LPTIMERS support on STM32H743 SoC
-Add DMAMUX support on STM32H743 SoC
-Enable STM32H743 clock driver
-Add MDMA support on STM32H743 SoC
-Change pinctrl pinmux entries for all SoC.
* tag 'stm32-dt-for-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: Add MDMA support for STM32H743 SoC
ARM: dts: stm32: Enable USB FS on stm32f746-disco
ARM: dts: stm32: Add USB FS support for STM32F746 MCU
ARM: dts: stm32: Enable USB HS on stm32f746-disco
ARM: dts: stm32: Enable USB HS on stm32746g-eval
ARM: dts: stm32: Add USB HS support for STM32F746 MCU
ARM: dts: stm32: change pinctrl bindings definition
ARM: dts: stm32: Enable STM32H743 clock driver
ARM: dts: stm32: fix hse clock frequency on STM32H743 Eval board
ARM: dts: stm32: add Timers driver for stm32f746 MCU
ARM: dts: stm32: Add DMAMUX support for STM32H743 SoC
ARM: dts: stm32: Add lptimer definitions to stm32h743
ARM: dts: stm32: add vrefbuf to stm32h743
ARM: dts: stm32: Add I2C1 support for STM32F746 eval board
ARM: dts: stm32: Add I2C1 support for STM32F746 SoC
Pull "Samsung DTS ARM changes for 4.15" from Krzysztof Kozłowski:
1. Add new board: Hardkernel Odroid HC1.
2. Fix incomplete Odroid-XU3/4 thermal-zones definition leading to
possible overheat if first pair of A7+A15 cores is idle but rest of
CPUs are busy.
3. Add capacity-dmips-mhz properties for CPUs of octa-core SoCs.
4. Add power button to Odroid XU3/4.
5. Improvements in Gscaler, HDMI and Mixer blocks on Exynos5.
6. Add suspend quirk to DWC3 USB controller to fix enumeration of
SuperSpeed devices on Odroid XU4.
7. Add HDMI and MHL to Trats2.
8. Cleanups (redundant properties and nodes).
* tag 'samsung-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: samsung: Document binding for new Odroid HC1 board
ARM: dts: exynos: Add HDMI and Sil9234 to Trats2 board
ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board
ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi
ARM: dts: exynos: Add dwc3 SUSPHY quirk
ARM: dts: exynos: Add status property to Exynos 542x Mixer nodes
ARM: dts: exynos: Add status property to Exynos 5250 HDMI and Mixer nodes
ARM: dts: exynos: Cleanup HDMI DCC definitions on Exynos5250 and Exynos542x boards
ARM: dts: exynos: Move HDMI PHY node from boards to exynos5250.dtsi
ARM: dts: exynos: Use specific compatibles for proper Gscaler limits on Exynos5250 and Exynos5420
ARM: dts: exynos: Remove redundant interrupt properties in gpio-keys on Odroid boards
ARM: dts: exynos: Add power button for Odroid XU3/4
ARM: dts: exynos: Remove the display-timing and delay from Rinato
ARM: dts: exynos: add exynos5422 cpu capacity-dmips-mhz information
ARM: dts: exynos: add exynos5420 cpu capacity-dmips-mhz information
ARM: dts: exynos: fix incomplete Odroid-XU3/4 thermal-zones definition
Pull "DaVinci DT updates for v4.15" from Sekhar Nori:
Add support for accessing DSP on DA850 SoC when using
device-tree.
* tag 'davinci-for-v4.15/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da8xx-dt: Add OF_DEV_AUXDATA entry for DSP clock matching
ARM: dts: da850-lcdk: Add and enable CMA reserved pool for DSP
ARM: dts: da850: Add DSP node
The Faraday TVE200 is present in the Gemini SoC, sometimes
under the name "TVC". Add it to the SoC DTSI file along with
its resources.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "Renesas ARM Based SoC DT Updates for v4.15" from Simon Horman:
* r7s72100 (RZ/A1) Peach board
- Add pin groups for SCIF2 serial debug interface and Ethernet
This avoids relying on bootloader settings
- Support control of LED1 using gpio-leds
* r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs
- Add MSIOF[012] support and define aliases for spi[0123]
* r8a7743 (RZ/G1M) SoC
- Add I2C and IIC core nodes
* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
- Enable SDHI1 SD controller supporting high-speed and SDR50 transfers
- Add chosen node to allow correct selection of serial console
and the kernel command line
- Enable RTC support
- Enable USB2.0 host support
This includes enabling USB PHY and internal PCI
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven and
r8a7745 (RZ/G1E) iW-RainboW-G22M-SM SoMs
- Enable Add SPI NOR support
This devices is used to boot up the system to the SoM DT
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
- Enable SDHI0 SD controller supporting high-speed transfers
* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
- Add pnctl support for scif4
This avoids reling on boot loader settings
- Add EtherAVB support
* r8a7745 (RZ/G1E) iW-RainboW-G22M-SM SoM
- Add basic SoM support
- Enable MMCIF eMMC support
- Enable RTC support
- Enable SDHI1 SD controller supporting high-speed transfers
* r8a779[0-4] R-Car Gen2 SoCs
- Add reset control properties
Geert Uytterhoeven says:
This patch series describes the reset topology on all R-Car Gen2 Socs,
like was done before for R-Car Gen3 and RZ/G1.
Resets usually match the corresponding module clocks. Exceptions are:
- The audio module has resets for the Serial Sound Interfaces only,
- The display module has only a single reset for all DU channels, but
adding reset properties for the display is postponed upon request
from Laurent.
- Convert to new CPG/MSSR bindings
Geert Uytterhoven says:
Currently Renesas R-Car Gen2 SoCs use the common clk-rcar-gen2,
clk-mstp, and clk-div6 drivers, which depend on most clocks being
described in DT. Especially the module (MSTP) clocks are cumbersome
and error prone, due to 3 arrays (clocks, clock-indices, and
clock-output-names) to be kept in sync. In addition, the clk-mstp
driver cannot be extended easily to also support module resets, which
are provided by the same hardware module.
Hence when developing support for R-Car Gen3 SoCs, another approach
was chosen, which led to the CPG/MSSR driver core, and SoC-specific
subdrivers (initially for R-Car Gen3, but later also for RZ/G1).
This series converts the various R-Car Gen2 DTSes to migrate to the
new CPG/MSSR drivers that were added in v4.13-rc1.
* r8a779[0,1,3,4] R-Car Gen2 SoCs
- Stop grouping clocks under a "clocks" subnode
Geert Uytterhoeven says:
The current practice is to not group clocks under a "clocks" subnode,
but just put them together with the other on-SoC devices.
Hence this patch series implements this for the various R-Car Gen2
DTSes that still need this (r8a7792.dtsi is OK).
* r8a7794 (E2) Alt board
- Correct inverted sense of SD wip pins
* tag 'renesas-dt-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (48 commits)
ARM: dts: r8a7743: Add MSIOF[012] support
ARM: dts: r8a7745: Add MSIOF[012] support
ARM: dts: iwg22d: Enable SDHI0 controller
ARM: dts: iwg22m: Add SPI NOR support
ARM: dts: r8a7745: Add QSPI support
ARM: dts: iwg20m: Add SPI NOR support
ARM: dts: r8a7743: Add QSPI support
ARM: dts: iwg22m: Enable SDHI1 controller
ARM: dts: r8a7745: Add SDHI controllers
ARM: dts: r8a7794: Add reset control properties
ARM: dts: r8a7793: Add reset control properties
ARM: dts: r8a7792: Add reset control properties
ARM: dts: r8a7791: Add reset control properties
ARM: dts: r8a7790: Add reset control properties
ARM: dts: r8a7743: Add IIC cores to dtsi
ARM: dts: alt: use correct logic for SD WP pins
ARM: dts: iwg20d-q7: Enable USB PHY
ARM: dts: iwg20d-q7: Enable internal PCI
ARM: dts: r8a7743: Link PCI USB devices to USB PHY
ARM: dts: r8a7743: Add USB PHY DT support
...
Pull "DTS updates for the Integrator PCIv3 driver" from Linus Walleij:
These are the DTS file changes required to fix bugs and satisfy
requirements for the new PCIv3 driver in the PCI subsystem.
The binding changes have been merged to the PCI tree.
[arnd] Note: this is an incompatible DT binding change, so things
will break during bisection or when using an old dtb file.
Since integrator has no real users, we can make an exception
for that.
* tag 'integrator-pciv3-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: Update Integrator/AP PCI v3 compatible
ARM: dts: integratorap: Fix PCI windows
ARM: dts: add the PCI clock to the device tree
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:
perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'
Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
"interrupt-parent" property is declared in root node, so it is global
to all nodes. This property is re-declared in few sub-nodes. To avoid
duplication this property is removed from following sub-nodes:
pmu, amba@0, amba@0/ethernet.
Signed-off-by: Surender Polsani <surenderp@techveda.org>
Acked-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The SX150X GPIO expander has been moved to pin control and
its Kconfig symbol has been renamed. We used to have a paper-over
thing in Kconfig but it was causing circular dependencies so
I have had to kill it off. Select the right driver instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable Sony Z2 tablet options
* Enable USB on APQ8064/MSM8974
* Fixup/catchup config to support newer options
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZ5QPSAAoJEFKiBbHx2RXVcckQALMEced9zWwImrhz29mCViEf
t19dSUOXQHyH8pPZ+j8/FhUzk30wiMicOfCjFlZb0mYcKkqAQ7imyi4ztQfiUljh
GHaE4ZgeNDpeW/4/B6JABT9eIW1MkFasedHlKqzUsW5ruIn4WvDJpIdwHwMLhJbF
bmgjt1YBqdHrcMgTT3su5JLHaOb4vOottXhCkm2ntIjY/OSKo26dAjHIx1Zj7VTV
9X2Yqjs5G+FZPtJa8EEW2h33xWtQIi2olymhZZRO3H4wQ/O3zuBViR6NGUqAWAde
9wwRUC4e1INk+XiLApItJEEJzf1oS2nSh/dhmyog98NlKkAuqtkm4sMDSadu+bOv
FEvcxM3Do6/WQuyinm+WAc2ZeIqLWPqSy5aAIB/8dZwMpQqJ3xQ2j0JjjpZyElom
tkUR87Qj2b4g4vLWam1fjAFY8ungeApSPPoK3p9BjSh0njmAFe43SJjucNMG/ZSZ
GEcs6sPPIMYgIJhyBzlsBApOb7sEkT7t70LU7mH9vwlXiNFugckEUppN8loIhKp7
7t/iPf/UypErnpC4nS4qZbLWhS2NYkPlsV7NY5OClb8a3KU4g5f0xewkV31nol9U
Bu+e+1bbYwPCowdWtWGbZ2uI3ezcj3aLCXnwU0FUDSlMXkrrQu0TMRRipTtwDMoM
UrP8VaqRzF8/5VBCFIMC
=90WE
-----END PGP SIGNATURE-----
Merge tag 'qcom-defconfig-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/soc
Pull "Qualcomm ARM Based defconfig Updates for v4.15" from Andy Gross:
* Enable Sony Z2 tablet options
* Enable USB on APQ8064/MSM8974
* Fixup/catchup config to support newer options
* tag 'qcom-defconfig-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: qcom_defconfig: Enable Z2 Tablet related options
ARM: qcom_defconfig: Disable DEBUG_GPIO
ARM: qcom_defconfig: Enable configs for USB on apq8064/msm8974
ARM: qcom_defconfig: Resync with new Kconfig options
1. Cleanups for s3c24xx and s3c64xx (memory allocation printks, code
style).
2. Remove of Exynos4212 related dead code (no more support for this
SoC).
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZ4xDZAAoJEME3ZuaGi4PXWx4P/iEsO7Cbcc/rV8HjCjwIZY2h
VomlTxxcL0P0d+bkDrkAl2f2BHl2rhfC3D4PoBNjFMeyYficqfgjRO4Zrhj1jL0g
9JxiqcLVVpnn0wWgd5B3UPiLqSWGXPB7PCsdA/P/TjBonu+jmFbFtSRZtcFdLuIH
uVKVnFLSzcnO4a//F5/Hf6OGbH4W7R69eIu2Ft7isjmFlSJOV4kAfOCNqlCUhaOm
zhVai9StZpkDFfCKA4ksGdQITuMqJRldlklKfKJtm9AO8Njc96wMu/xvbtR+NzS6
eWWgsCnrQsh35O9qK2fiyQPWa+Nm0Z8QyfTz2Td3wtnYpOOD8qEghow+5dQfhucl
CP1nqwW0reK/ieq6qyR1tyJR/fHSmBQJLNGAfDf9n3EIoAIoo2ExxpE+XvdsP0rr
GsN+PMFMOCSZl82UP3O9zN6QwjTRf9a3In3JaxJlAkmQe984d4dXzb84RCfKspFV
0jLPypiuRGBnWey8QHzdRPtdXyCcZdUt0+f6TjtsIf0SHPu0p7Qu2S9v/kiEyVDp
uOytpuLQup0/x35oYmEEKUwdGJefUehZm/rEKFYVQywn46YK1rQhvyJP3bDjW8Yy
eQK8t2kTqhmMGycEW+1374LeA35pMXUaydAefBJXjqMApxMwUvsC4cd35ABfTONm
FhQQ5KHK0O9WGC4GKzgI
=vGPQ
-----END PGP SIGNATURE-----
Merge tag 'samsung-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Pull "Samsung mach/soc changes for v4.15" from Krzysztof Kozłowski:
1. Cleanups for s3c24xx and s3c64xx (memory allocation printks, code
style).
2. Remove of Exynos4212 related dead code (no more support for this
SoC).
* tag 'samsung-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Remove Exynos4212 related dead code
ARM: SAMSUNG: Simplify size used for kzalloc
ARM: SAMSUNG: Remove printk for failed memory allocation
ARM: s3c64xx: Delete an unnecessary return statement in samsung_bl_set
ARM: s3c64xx: Remove printk for failed memory allocation in samsung_bl_set
ARM: s3c2410: Fix typos in a comments
ARM: s3c24xx: Simplify size used for kzalloc in iotiming get
ARM: s3c24xx: Remove printk for failed memory allocation in iotiming get
1. Enable USB3503 on multi_v7 for Odroid U3.
2. Enable USB Attached SCSI for Odroid HC1.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZ4xAQAAoJEME3ZuaGi4PX0JIQAIA3XkkkjHthSKEennMX7kUi
eQTL+6a64KCL3b4wl60Y6gqp2MsR65kcEx/PVUGBnZ1HHzHZ0FItbTNThQRg/n/y
rVGCILIuo6kGsAL/xaSUOe/fdLsw7HhFDuYVUzidWisO2AH/uw0uAovrTUpV+vhQ
JG51phGz0wLg52Zb4c5kkHOrD4U5/aiQMha5MjHctdWEckmADx/4IVJ2wnyn6LtN
XedKqVg27Ye2PhOu3f97RCi290sPVDP8RFhbKbXV7qKj6HtahPjvbq4Uspewt2qM
XhH80jay6RdwxrR+Yw7M42H4Qb7kRWoe/WYFfwU7C2zN3LP5E+eZ4Q155DXSzk12
Snj7cg0FNWIy7C0MYnzAxfF+o99MEtVj8L2uE9TMyrlM8H92bs8bHSdyR4mY/oU9
qrpU0J0tDiHQNHxeD35lm1toEDslmHGDZUxH3vHj1lKupfQurBZvkFsm6Uiicijt
gab8aGlnfSMr6Xesbye9cqHo/RaQLZR0lp/kppeAgAtLvLfiAAKMvrl5R9Pudlwu
Aw6L1ritS69kZt8+6eXvpYqErs2mjYHKtGiWloOqlWtDsuwNu6JAbNaR4P1DujvM
xCMDldrijwN8cIxHTfl5gEDPdNv8mibKQnZ7wNx++hXeEQfACm392DXzcXIAFtR0
c+ys6jLWTCBfTrCmEcBz
=+nLs
-----END PGP SIGNATURE-----
Merge tag 'samsung-defconfig-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Pull "Samsung defconfig changes for v4.15" from Krzysztof Kozłowski:
1. Enable USB3503 on multi_v7 for Odroid U3.
2. Enable USB Attached SCSI for Odroid HC1.
* tag 'samsung-defconfig-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: multi_v7_defconfig: Enable UAS support for Odroid HC1 board
ARM: exynos_defconfig: Enable UAS support for Odroid HC1 board
ARM: multi_v7_defconfig: Enable USB3503 driver
fixes and clean-up in preparation for dropping more platform data later
on:
- Fix am33xx/am437x MMC address space offsets
- Fix overwriting clkctrl and modulemode values when dts data is
used
- Drop unused platform init code for omap_init_hdq
- Drop unused struct omap_hwmod_mux_info
- Remove duplicate define for dra722 es1.0 silicon revision
- Add support for dra71x es2.1
- Make omap_dma_dev_info __initdata
- A series of fixes for Coccinelle found issues
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlng6dwRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNHxw//U61yomGBb5cEjDnRwB0cYVkPWSFGgUvB
HW125O5EWmN8+IHzsd9SHk6jrQ35LcNknQzbiG1F/E9X5C+xtnUGed3B/xHxeTl4
80HCYSBdZv4CnDJPK1JzYxKPSsfR6caTg57cWcxqs8mCjs7qTjUKCbqOouW9SyEh
Vjd0QxTBbB8FIGn367WcZhacmbRikp549M//WC2VQUMln9AWzFaCXSuP1Od7jb+p
juau0hwgmgH0aDh4T8jqp3xEm3nIqAmjCgPp9RQiAmmNMDVWd/SERQ4nVoylFiaX
R25l7cZUF9hSC0TJSWxXVbSgnrObVId4jpi/kIOrQwPmJq1VdCS8Egv3jujULZjG
dPeyvcOGWSwl7uiA5j13vtgQZgkUIG4yIlJul5IlSGgwBvv25zG6ot6ErC0h/Zli
MwJ0UCGXet4PvX1lZLw5QHWHuUaWAL7qahOM0dZn7ki9xtJmMi125eMU9uBDpRVR
aQAZxuiw58TdHzK/EHm5K3HSOSWj2AZKJnk52BWTB8F3AY4d/j5ZubHya532BSzh
P1AMfvdrxZ7RpEWH92rhcC5JRtPFEpKYuUakdjV6mnWgNdQyDICQvIp5b3gC4Y1L
wL3AdFeYFT/klK8UCwNN/q2JINBntbWPM2//YMcEM28IbZgSM0FVIwX+4bImjaL+
vq0zTJrWWjg=
=oSR0
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "OMAP soc changes for omaps for v4.15 merge window" from Tony Lindgren:
SoC changes for omaps for v4.15 merge window that are mostly non-urgent
fixes and clean-up in preparation for dropping more platform data later
on:
- Fix am33xx/am437x MMC address space offsets
- Fix overwriting clkctrl and modulemode values when dts data is
used
- Drop unused platform init code for omap_init_hdq
- Drop unused struct omap_hwmod_mux_info
- Remove duplicate define for dra722 es1.0 silicon revision
- Add support for dra71x es2.1
- Make omap_dma_dev_info __initdata
- A series of fixes for Coccinelle found issues
* tag 'omap-for-v4.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: Fix typos in two comment lines in _omap_dm_timer_request()
ARM: OMAP: Use kcalloc() in omap_system_dma_probe()
ARM: OMAP: Improve a size determination in two functions
ARM: OMAP: Delete an error message for a failed memory allocation in two functions
ARM: OMAP2+: make omap_dma_dev_info __initdata
ARM: DRA722: Add support for DRA71x Silicon Rev 2.1
ARM: DRA722: remove redundant definition of 1.0 device
ARM: OMAP2+: Drop unused omap_hwmod_mux_info
ARM: OMAP2+: Drop unused omap_init_hdq
ARM: OMAP2+: Fix overwriting of clkctrl and modulemode values
ARM: OMAP2+: Fix MMC address space mismatch for am33xx and am43xx
Fix to allow UP build of shmobile.
Arnd Bergmann says:
A bugfix for the SMP case broke the build for the UP case:
arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu':
(.text+0x34): undefined reference to `secondary_startup'
The assembler file mixes code that is used for SMP with code
that we also need on a single-CPU build, so I'm leaving it
always enabled in the Makefile, but enclose the SMP code
in an #ifdef.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZ3cuqAAoJENfPZGlqN0++DH0P/jqdIbnGM9TlXaAJ0zwJpucK
Kmp/y9n4PNdyp1kglnLikOZQ72GXvH/DErbFEVA5p3o4iOxs+dgkf3KFI0+gIybD
nPQO1oQqOkY/icuOG+PwR/7bAZtWQM/N2vJlwSCFJAz6X2n0dzoBqMjBni67vtXi
V34GpzOF+R0JtTSSC5/xPoXyac57/7MxwJM1F/vG8ZPoVxerYlogrMr8mQD7LUmK
IjdpKOjOktJpetvNBzS/hm0sWjSZ7+YAT0VwSyPMfqFbyP5iaWwfRN0TYpE2CRU7
t54MNsfCbkCPBdgz4jhLbfSW4TFX5eQD233F/0Uj1J0CAwdOqsGa+lRffIK4EU9m
Ihcp+JkGqRI0f8HAECO88Yne9xU1Covvt18E5OY7vxxq/9KkFNY/6m3IGoaTDZlP
H14PRiA/ebX2hoqftNZtUDu423CogBCEsvzt5XEK/vfsRE7K9PY8m/qGSd2+JMqd
XtgauQ+DBRQ/qIlJUTv8Lrkf/xVAWYVOz7wr+pLnHWJxL3+JFKol4eePs7xGHkUA
cwl8T0r9/gd9L/w8onOA5u4amRXBJxS/mgTru1O26IKKoGwi5xw9c+bcbBkCGkBn
PaZjVAd5gzlGzjEP2qIn8+qXH9UdAjlSLwmerDCWKhSMaXsDtuY6BVidRzGYEhOj
4me8BOxi61OJWkiQ511T
=EVGn
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Second Round of Renesas ARM Based SoC Updates for v4.15" from Simon Horman:
Fix to allow UP build of shmobile.
Arnd Bergmann says:
A bugfix for the SMP case broke the build for the UP case:
arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu':
(.text+0x34): undefined reference to `secondary_startup'
The assembler file mixes code that is used for SMP with code
that we also need on a single-CPU build, so I'm leaving it
always enabled in the Makefile, but enclose the SMP code
in an #ifdef.
* tag 'renesas-soc2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: rcar-gen2: fix non-SMP build
This patch adds interrupt-names property in audio node so that
binding can be agnostic of the IRQ order.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds board related config for MT2701 pwm backlight.
Signed-off-by: Weiqing Kong <weiqing.kong@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds the device node for MT2701 pwm backlight.
Signed-off-by: Weiqing Kong <weiqing.kong@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
It has been superceded by a modernized driver in the PCI
subsystem host/ directory.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZzBZQAAoJEEEQszewGV1z+0MQAIJ+o2LDWn/B5Srs+fl0nulp
qOTCcHTsnp+EaJNB6b6WxB8Zz7yMx1CO91bIJQp1WDNaQKbq5C7yc1y8c0llgIwz
rTnQcotfgC8Ucbf7NYcV7QNF8BLWtZi4Lv6iXo+JrsKf2ITD+dMyMyztoXlrjICC
R3xv3SqtpHllMMssS6O0a1MIxbMrbnJhoAfET1/Y7DT6d8h7bzgSQHA/71OQKQo3
nlyy8vUY0AWbb0hObP2rbNtUlpBqITL5cZBYaWIIY7ujoCTUCkUdBaUZVkdkXurX
zTbHO9SEpwM9d6GhXZ1A1cxytQbO0tNpXVsU+gd2+o0x5pakwKjmYOdP6S4xCuEo
qkOySX9sVrSW4VkMUvPtOhmJrhIYWcI/BYa7tQiZr5/fhcwXGrb1EZ1LWV2xhaFp
QtaocTiuBueaOawH/QzMljCbGBQHW0uVQ8MQiGHXJzxJHXTamYOecGQs/Wyr4mQR
4b3yrExv5hyvIeJiv+WKZYobRDkFOzr1RO0RRY42VHxPzsc43BbkhIwXSHjI0CQU
i48rt2uvEK/+6lsScXI7n3teHxmbZB5s+HoFH60VgW+73C16cjVGgRDrbV3P4qWJ
4l+HHeiupNCE3s1pZxtb73sX3mzyDDO8QJFUwjVrFhE09mNNvEln+rClfraXWZ1s
ycPGvW0KniaGBvXcDNYF
=rknj
-----END PGP SIGNATURE-----
Merge tag 'integrator-pciv3-delete' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
Pull "Delete old PCIv3 driver" from Linus Walleij:
This deletes the old PCIv3 driver in the Integrator machine.
It has been superceded by a modernized driver in the PCI
subsystem host/ directory.
* tag 'integrator-pciv3-delete' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: Delete the V3 PCI driver
please pull the following:
- Danilo removes the clock provider driver stubs which are no longer needed
now that we have a proper CPRMAN clock provider driver
- Stefan moves the SMP startup code for BCM2836 from the interrupt controller
driver down to where it belongs in the architecture code, this was requested
by Marc Zyngier before comitting any fixes to that code
- Phil provides a fix for a future Raspberry Pi firmware which will make the
secondary cores wait for an event and therefore requires the CPU onlining
other cores to send such event (along with the appropriate barrier)
- Florian fixes the BRCMSTB UART debug stub to work correctly when using an
ARM BE8 kernel since there were some missing register read swapping needed
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZyVHeAAoJEIfQlpxEBwcE7AMP/jnZEy5IFVj/CwfJ2TeGm3/a
qHY3+OVgslDwmYclT5Ce/HVmlcSxiwiUQa5f5oRuIPKdjJN4pQaAi6H/axK0n5Xf
ZUgqbkZ+yqYDmwC5YtzUqlV1i6u5o5LyQfsbP1Q/ql7eWh3xIGLBo3Ou7fjJKy7m
afF+VRStKbHblzDL1GMeW4VTCmDpSWq1bNAz8GE54SrArlMe327oUwoynVs7D8/a
ENExNdUNz8ZuMX5JBjn26Feexetsa+8cq03DTl50Ij61N17BxYrQZDvnrchgdF4t
L2mImw14KEBuz1bvc+No3kKYnX4wHHA/qj86ecP+LtAURm4wKQWk7blcCQiJwbiZ
upwLgGSZp1opK11RhHKV9Br0diR59ipq9Y+Vzrqsq+NEpnjz7zahuPZHZ877sY15
WZ8PXGdnvs9FEi259Cx3von6JcyZ6enpcNKKf0PmBHZjmPcMQ1ZVLrZiUVAQD5qt
vX3x5iDDF+CuStxXgmApnp1S6D5SttdTIj7mcOkADywt6F5l9hlNX5phyG3VVYIR
1wbi5wkyvdIWdFTFtE5YrGdtikBHsTtnMZAii2P7HQP0xq2colM4XB1nMVvRIG1B
7Ky+qucZkj+syIb+cih6OIzoWoz4IJBbK54W3bowBPhSfflQkxuhO8RUdMTR5krb
bDrcnH7ICOpe51OhGJ5O
=h/36
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.15/soc' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.15 (part 1)" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC/Kconfig changes for 4.15
please pull the following:
- Danilo removes the clock provider driver stubs which are no longer needed
now that we have a proper CPRMAN clock provider driver
- Stefan moves the SMP startup code for BCM2836 from the interrupt controller
driver down to where it belongs in the architecture code, this was requested
by Marc Zyngier before comitting any fixes to that code
- Phil provides a fix for a future Raspberry Pi firmware which will make the
secondary cores wait for an event and therefore requires the CPU onlining
other cores to send such event (along with the appropriate barrier)
- Florian fixes the BRCMSTB UART debug stub to work correctly when using an
ARM BE8 kernel since there were some missing register read swapping needed
* tag 'arm-soc/for-4.15/soc' of http://github.com/Broadcom/stblinux:
ARM: brcmstb: Add appropriate ARM_BE8() macros for swapping
ARM: bcm2836: Send event when onlining other cores
irqchip: bcm2836: Move SMP startup code to arch/arm (v2)
clk: bcm2835: remove remains from stub clk driver
* Prepare to enable SMP on R-Car E2 (r8a7794).
Geert Uytterhoeven says:
"The main hurdle here is that R-Car Gen2 boot loaders do not initialize
the arch_timer CNTVOFF register, which thus needs workarounds on Linux.
- The first patch adds a definition for MON_MODE, as suggested by Marc
Zyngier,
- The second patch makes sure CNTVOFF is initialized for boot and
secondary Cortex-A15 and Cortex-A7 CPU cores, like is already done for
the boot Cortex-A7 CPU core. Without this, the ARM arch timer does
not work on secondary CPU cores."
A follow-up patch to enable SMP in DT on R-Car E2 (r8a7794) is currently
deferred unto v4.16 as it depends on the above.
* Enable low-level debugging support for RZ/G1E (r8a7745).
Fabrizio Castro says, "RZ/G1E uses SCIF4 for the debug console."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZyLU1AAoJENfPZGlqN0++MsIQAIgwPv0a1uChS3rpMSsm1j9Z
kh5Xyu+JHSLT9XrX7KvH0dY7Or4y+36neZsHUWzb7JZm4BpKfuJ14jiO/diEh9qC
UFdSgrsm4ARMnVGo/SaqwuYFSJZlE91EdN8G+NQFi9UB/BXJzsJYRaqif3IuOaVw
Bc4NGrNLu6k5Y2MWYdfoeIOwvSRRy16Tts4YESyBESv97JR+7QjObC3LRMarS8XA
Qc/CRXiFxWlbYVuquoSo1quZW43u1mMxXGCYI9EX+uGHlLrd28Vjh0Rq2ZCs84tc
tVswAkLbnZVIlvJO9ovXW1y1zYw1jA7KrLLgJSff68fC6lXfV8RMgwTU1f3N2K6w
9U4PEjdPxyagGnUhX5bjOFGZC079j5xauOMwDWGEM4Jt1wsPZUPO83G9G19dbmeA
zECBMqWqeXTnR4oRpolF0A53wqbIqe+GuQ8mYnZQCEvwx6mjuhPk4ae3AwpcvcQP
Zlt1OSe0c9c/IRBeNK4q1qXXYG24AoBfzQ4L0EALKU1ESg3RYKMdH6WWcbezmp+q
N4idtVnl+NowBtuvBzpao7EdYlGTHolsUJfYhwXxdKKWnxFzuOQapHC/PR5P6jnJ
yzrc/rhWkWAShobzhYz+y21U93Aok96Fh3XqI0Lw+IRAN/l9kXKaQdlQJN+gfJ/4
yhudaIIlPCU6BGrbi0gK
=4lQB
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.15" from Simon Horman:
* Prepare to enable SMP on R-Car E2 (r8a7794).
Geert Uytterhoeven says:
"The main hurdle here is that R-Car Gen2 boot loaders do not initialize
the arch_timer CNTVOFF register, which thus needs workarounds on Linux.
- The first patch adds a definition for MON_MODE, as suggested by Marc
Zyngier,
- The second patch makes sure CNTVOFF is initialized for boot and
secondary Cortex-A15 and Cortex-A7 CPU cores, like is already done for
the boot Cortex-A7 CPU core. Without this, the ARM arch timer does
not work on secondary CPU cores."
A follow-up patch to enable SMP in DT on R-Car E2 (r8a7794) is currently
deferred unto v4.16 as it depends on the above.
* Enable low-level debugging support for RZ/G1E (r8a7745).
Fabrizio Castro says, "RZ/G1E uses SCIF4 for the debug console."
* tag 'renesas-soc-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15
ARM: Add definition for monitor mode
ARM: debug-ll: Add support for r8a7745
Enable BQ32000 RTC driver in multi_v7_defconfig.
Biju Das says, "The iWave RZ/G1M Q7 SOM supports RTC (TI BQ32000).
To increase hardware support enable the driver in the
multi_v7_defconfig multiplatform configuration."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZyLKXAAoJENfPZGlqN0++vs4P/1RuWA/LDsUoaZSVVEUl5Y6v
eqE+nrysbo8yRwpl8lN/TZ2BYPvpnNkSBJbH4GbvCRpWYHQMLZwzHY4EvOAieP0h
JezmtxUc/9nNGTeqGU3RdVcP/FRFocO63z6gh50VGOyVPFXCafU9Ql4SYo1jisha
Fgw5SzsqsOzFQb13kVuxEzd7GNf5ByhV3ix/E5q2ruZn84YY4xj+WsQI8t4zIRTO
bzalcT/slUyo+QeL0CQTw5/8IB56rZDrgo6RqPcGGXqIMvGGkD+7dc4quQpHwMn3
3NIpt5rgETeiQgQdQTGp2jIZ87zPGmF5q7KKdpYGWzNE/q6lScvoTCbfyrzLW92r
Z2WUO4IulPn4K5hG3ko6QXfmHsuwsdPTkuuzeUflX37afXhljsyQyqJw5X7JcGPH
nr1hblVkjzWTnbOdz0XvjAvyapJcIFs3Qxl5+DZHFFFwSTsAG8CMgLe39qFjt6n/
qk60FhPAci+xq/1//K3x9EMkI5xIPVMPHX86InAOq282VzzHGZsdK2pKbIXvvyqc
VjPL1T9yt3skzMNgFvtX8clUCYBnbg33JEcec6ryQKHFSDNPvczmInXkMRCUfyiH
M87OG0iymFaDXFIB+UbhovS7ynZh8t/s2eSzvxYeIFSaiLZhRaxsJQe+4/BJpPau
kQJFD5MxAiZuDQ7cLD6a
=9Ep1
-----END PGP SIGNATURE-----
Merge tag 'renesas-defconfig-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Defconfig Updates for v4.15" from Simon Horman:
Enable BQ32000 RTC driver in multi_v7_defconfig.
Biju Das says, "The iWave RZ/G1M Q7 SOM supports RTC (TI BQ32000).
To increase hardware support enable the driver in the
multi_v7_defconfig multiplatform configuration."
* tag 'renesas-defconfig-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: multi_v7_defconfig: Enable BQ32000 RTC driver
converting the platform to sparsemem, using SPI-MMC
and a bit more.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZw4TxAAoJEEEQszewGV1zmM0P/0FNlDXZYfCtmFfol2iiIorK
2dwdb5PlfolB8O36QGcvohCgPQEO61PH/0dsx2RU1UYJlpQEuxRFNYJWVc+LRFh8
Pp/Kow+mKou0Fjfg1qtwRYVs9mjfJawR9MxBCs85GfIVncJGp82Kzv8OLFrZ5A3H
A3ibecTQGbt8/3LXIrFLS1QI8PioDv36ig679IKGK2aDmmWAsmrt9ZsC0ZnXhdK7
VvmezarpDUBXfxbcspUzOMW1BiO0Gzh8xPsBTyUZ1zBMYJo2rFH4OT6/AZfwl4Eb
vayYnfjd7Y2E51AgHGj8e/GLq+bhRb3BD0m2Fm3NKZqNFtks0U4EutpNdl/ByDG0
XkyEczv7tmiC7st/sKVvNo4x4hSCRuYmjWSxSdZHlR0tTPJ4YYJBrkZ3VcEIWFzn
rAnI9HHNu6jihNKJ8mddxA0HcIAs9uRk6F6/vfxc21c+8GXfjkifssgpcKwbgpG9
J0oOpUPFYKphDKuZBHGcgzUkewvjPYY7OaKl89lxc3dWXhoJ/Bg1G5kk1aQoPdwx
OSN0S9b0+ItgNYcsnb2dKOlsKnoEXDwGBIFqrEnVDHgP3BiOTIrNFhvihsq78tFO
E1RsSalo4Uba3HFQ1/cJBzpcRja4t0As/FRcIrkogYzLJ0F77tHvRjox05IVmvvT
agHYN7VFApLst65ixdOd
=TaBh
-----END PGP SIGNATURE-----
Merge tag 'ep93xx-for-arm-soc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
Pull "EP93xx improvements for v4.15"
EP93xx patches that have been floating for a while,
converting the platform to sparsemem, using SPI-MMC
and a bit more.
* tag 'ep93xx-for-arm-soc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: ep93xx: Add lm70 HWMON sensor to TS-72xx boards
ARM: ep93xx: tidy up TS-72xx Watchdog resources
ARM: ep93xx: simone: let the mmc_spi driver handle the card detect
ARM: ep93xx: switch to SPARSEMEM
The commit afece3ab9a ("PM / Domains: Add time accounting to various
genpd states") causes a boot regression for ux500.
The problem occurs when the ux500 machine code calls pm_genpd_init(), which
since the above change triggers a call to ktime_get(). More precisely,
because ux500 initializes PM domains in the init_IRQ() phase of the boot,
timekeeping has not yet been initialized.
Fix the problem by moving the initialization of the PM domains to after
timekeeping has been initialized.
Fixes: afece3ab9a ("PM / Domains: Add time accounting to various genpd..")
Cc: Thara Gopinath <thara.gopinath@linaro.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These platforms provide a clock to their watchdog, in each
case this is the peripheral clock (PCLK), so explicitly
name the clock in the device tree.
Take this opportunity to add the "faraday,ftwdt010"
compatible as fallback to the watchdog IP blocks.
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix the legacy PCI interrupt numbers for i.MX7. The numbers were
wrongly coded in an inverted order than what Reference Manual tells.
It causes problem for PCI devices using legacy interrupt.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZ5F/UAAoJEFBXWFqHsHzOQCwH/3SfH9+Akv0M0noDacXyzD+2
MvQGppmagSl8TNeeP0kYc7wk2TeuYc24LJyEAR5xhDwkxL5LGLbXtMr5LqxJszcB
smQqS9MHpyuIboepw3xBcDBi+vOy9fmrLv7WUnM3yEXWh6gR6VYYU0D4jK/xYmUo
urH0j8etj5sao02s7D3O0iSEvaxIxtjOHB6i9fCcHNtJXo7iw2lv0XhyQhE73IX2
LFkRCdtj8EBb+gjPQrXMUE0gn67mvxuzwOOVunEGwl/13cI3WQoRh7pugTB7NBNQ
fVyBW/8TLOqkKjPinqbnyMVdS1rwel+pfC2Q8jVnjfGNjrmnCxWbcR4R8YqQJsw=
=+4ri
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "i.MX fixes for 4.14" from Shawn Guo:
- Fix the legacy PCI interrupt numbers for i.MX7. The numbers were
wrongly coded in an inverted order than what Reference Manual tells.
It causes problem for PCI devices using legacy interrupt.
* tag 'imx-fixes-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7d: Invert legacy PCI irq mapping
Two device tree related fixes:
- One on Armada 38x using a other compatible string for I2C in order
to cover an errata.
- One for Armada 7K/8K fixing a typo on interrupt-map property for
PCIe leading to fail PME and AER root port service initialization
And the last one for the mbus fixing the window size calculation when
it exceed 32bits
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWeDbriMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71RAJAJ9TyT+GrMdf
HsM7V74bSWYAUlWZ0ACcCWjIdnbVlinP+iuVS462du4HpU0=
=2AQR
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.14-2' of git://git.infradead.org/linux-mvebu into fixes
Pull "mvebu fixes for 4.14 (part 2)" from Gregory CLEMENT
Two device tree related fixes:
- One on Armada 38x using a other compatible string for I2C in order
to cover an errata.
- One for Armada 7K/8K fixing a typo on interrupt-map property for
PCIe leading to fail PME and AER root port service initialization
And the last one for the mbus fixing the window size calculation when
it exceed 32bits
* tag 'mvebu-fixes-4.14-2' of git://git.infradead.org/linux-mvebu:
bus: mbus: fix window size calculation for 4GB windows
ARM: dts: Fix I2C repeated start issue on Armada-38x
arm64: dts: marvell: fix interrupt-map property for Armada CP110 PCIe controller
- one DT phy address fix for the new sama5d27 som1 ek
- two DT ADC patches that were forgotten while moving to
hardware triggers for sama5d2 (iio changes already applied)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZ24QUAAoJEAf03oE53VmQHGAIAJcmiYj0qsO8ModMQjFSBR6Q
YW/7r8TAvJDgABWdu1RcpBFhGuZepYEBNToDtYAP/fLWJ14s0PqpJFM0JKZWUh4Q
SsX6zKuUcER09QyvFRmRRtF6HlyL/X84Rkf6wUfNvdaUOEUNF4qotG/6281ZlHxF
+RdKQkvx6Tv9oZAKyk9dwiYj6YtmGhZ4JQNoj+4yCqQ+ImLVlbfkLGMSPIzE1/KO
3+crrYTFl+hFcy+66hFgMz7RvbH0k+6djBkg2PDV1aD2EklStP6V98Wpxwm+fYhz
ka2Up5w+aDlp5Snif7+pH6oP0A1FvveTlv3t1wp3q9B2iqF7Ps4A+9J1L7p0n/4=
=W4R5
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Fixes: second batch for 4.14:
- one DT phy address fix for the new sama5d27 som1 ek
- two DT ADC patches that were forgotten while moving to
hardware triggers for sama5d2 (iio changes already applied)
* tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2: add ADC hw trigger edge type
ARM: dts: at91: sama5d2_xplained: enable ADTRG pin
ARM: dts: at91: at91-sama5d27_som1: fix PHY ID
please pull the following:
- Loic fixes the console path on the Raspberry Pi 3 which was not correctly set
and would cause all sorts of confusion between the Bluetooth controller and the
kernel console
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZ2AFxAAoJEIfQlpxEBwcEFcsP/375LxHvuaw3Uo6HlrJ77+sF
RM1E6DfDPkcfk9MQ+U3UUKWBk66HU76epVIX+8H/ERxB0Y7gShhHG7wX54YzsA5Z
Wh/KiHC0HUGAhZWguOK88JSj9cO90k35tSp+JHktVbtI6lf2r14ZQeMgcnulFuHM
rAbBmC+ap2ACOtGKg/Glj3205yqhllxUEBU3pu5kDZaRWTGqifJaa4DyKGGDx7KS
YDqAYs3EB6i753CDwoztxtQj1gEVrFSmLEcbdrUnAPGFTv2IDy2faxjpfAdus6q4
NMzSa0A4MRsEM/FaxYyF64y0SQyqeEFZ7Znj8bU7mEJrE0cpjPEXrRRqwCyceIv3
4FjEIkd2x8b+drIm6yXaMAQuMSuIsWwO2RUGJnF8JG8XXMuUDL5bZpnn2RrsTmcb
RjcOddgPgQusLJnRB86SkHWts8Bu/a8Q+gQQgfZsVXtpqZvyjEw3GPWnPoQEKmCI
ZvDbIP7VQe+niCGMBu9jez+sNjOkvUz0SyWnPg/Va0lofKifp4ZZxlX9SwRFOQAy
ii3b5O+WYCVNnWgGOBkSOHbqb6nnrpwgQk2CsdRuB86c/yzhv3/dpr+cXPSX0h+q
4c5fNxfcJThgSL86lm/L/SZ1Fuc+MFbYaKcLJLMY1JZ7kxUcaKMqrRUojh9/AoiU
89ksb1UE2vTclL8q1nyY
=GeQi
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.14/devicetree-fixes' of http://github.com/Broadcom/stblinux into fixes
Pull "Broadcom devicetree fixes for 4.14" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC Device Tree fixes for 4.14,
please pull the following:
- Loic fixes the console path on the Raspberry Pi 3 which was not correctly set
and would cause all sorts of confusion between the Bluetooth controller and the
kernel console
* tag 'arm-soc/for-4.14/devicetree-fixes' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Fix console path on RPi3
A new feature Range Selector (RS) has been added to GIC specification
in order to support more than 16 CPUs at affinity level 0. New fields
are introduced in SGI system registers (ICC_SGI0R_EL1, ICC_SGI1R_EL1
and ICC_ASGI1R_EL1) to relax an artificial limit of 16 at level 0.
- A new RSS field in ICC_CTLR_EL3, ICC_CTLR_EL1 and ICV_CTLR_EL1:
[18] - Range Selector Support (RSS)
0b0 = Targeted SGIs with affinity level 0 values of 0-15 are supported.
0b1 = Targeted SGIs with affinity level 0 values of 0-255 are supported.
- A new RS field in ICC_SGI0R_EL1, ICC_SGI1R_EL1 and ICC_ASGI1R_EL1:
[47:44] - RangeSelector (RS) which group of 16 TargetList[n] field
TargetList[n] represents aff0 value ((RS*16)+n)
When ICC_CTLR_EL3.RSS==0 or ICC_CTLR_EL1.RSS==0, RS is RES0.
- A new RSS field in GICD_TYPER:
[26] - Range Selector Support (RSS)
0b0 = Targeted SGIs with affinity level 0 values of 0-15 are supported.
0b1 = Targeted SGIs with affinity level 0 values of 0-255 are supported.
Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Enable the CEC controller on Jetson TK1 so that it can be used to
communicate with CEC devices via the HDMI connector.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add support for the Tegra CEC IP to the Tegra124 DTSI and link it to the
HDMI controller via phandle.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add node for xhci. Boards DT files will enable it if needed.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On some i.MX6 SoCs (like i.MX6SL, i.MX6SX and i.MX6UL) that do not have
speed grading check, opp table will not be created in platform code,
so cpufreq driver prints the following error message:
cpu cpu0: dev_pm_opp_get_opp_count: OPP table not found (-19)
However, this is not really an error in this case because the
imx6q-cpufreq driver first calls dev_pm_opp_get_opp_count()
and if it fails, it means that platform code does not provide
OPP and then dev_pm_opp_of_add_table() will be called.
In order to avoid such confusing error message, move the speed grading
check from platform code to the imx6q-cpufreq driver.
This way the imx6q-cpufreq no longer has to check whether OPP table
is supplied by platform code.
Tested on a i.MX6Q and i.MX6UL based boards.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Various A10-based development boards have standard HDMI connectors
wired to the dedicated HDMI pins on the SoC.
Enable the display pipeline and HDMI output on boards I have or have
access to schematics:
- Cubieboard
- Olimex A10-OLinuXino-LIME
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
All the A20 devices I own have standard HDMI connectors wired
to the dedicated HDMI pins on the SoC:
- Bananapi M1+
- Cubieboard 2
- Cubietruck
- Lamobo R1 (or Bananapi R1)
Development boards from Olimex also have standard HDMI connectors.
Schematics for them are publicly available. Enable HDMI on them as
well.
- Olimex A20-OLinuXino-LIME
- Olimex A20-OLinuXino-LIME2
- Olimex A20-OLinuXino-MICRO
Enable the display pipeline and HDMI output for them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Priit Laes <plaes@plaes.org> # Cubietruck, A20-OLinuXino-MICRO
Tested-by: Olliver Schinagl <oliver@schinagl.nl> # A20-OLinuXino-LIME2
Tested-by: Jonathan Liu <net147@gmail.com> # A20-OLinuXino-LIME
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20 has two interconnected display pipelines, mirroring the A10.
Add all the device nodes for them, including the downstream HDMI
controller that we already support.
Signed-off-by: Jonathan Liu <net147@gmail.com>
[wens@csie.org: Squashed in HDMI and provided commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10 has two interconnected display pipelines, much like the A31,
but without the DRCs between the backend and TCONs.
Add all the device nodes for them, including the downstream HDMI
controller that we already support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The R40 SoC has a watchdog like the one on A20, in the timer memory zone
(which is also the same on A20).
Add the device tree node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Add usb otg support for rk3288-vyasa, board support usb1 otg
power through otg_vbus_drv and naming conversion followed
as per schematic.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add usb host support for rk3288-vyasa, board support hub power
through phy_pwr_en and usb2 host power through usb2_pwr_en and
naming conversion followed as per schematic.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the external clock-reference, enable the gmac node
and define the phy-related pin settings.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add supporting regulators for rk3288-vyasa board, dc12_vbat is
parent regulatorand followed regulators as are child regulators.
regulator naming conversion followed as per schematic for better
readability and easy for identification.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
rk808, SWITCH_REG1 has configured for sdmmc regulator as vcc_sd,
so use the same by renaming vcc33_sd to vcc_sd(as per schematic)
and drop explicit regulator definition from root.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
vdd_log, never used on DCDC_REG1 of rk808 from latest schematic so
remove the same and update the regulator-name as 'vdd_arm' to sync
with existing rk3288 board dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add thermal zone and dynamic CPU power coefficients for RV1108
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add tsadc needed main information for RV1108 SoC.
750000Hz is the max clock rate supported by tsadc module.
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the USB pins and nodes for USB FS core on STM32F746 SoC.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch adds the USB pins and nodes for USB HS core on STM32F746 SoC.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Initially each pin was declared in "include/dt-bindings/stm32<SOC>-pinfunc.h"
and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX).
Since this approach was approved, the number of supported MCU has
increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new
file in "include/dt-bindings" each time a new STM32 SOC arrives I propose
a new approach which consist to use a macro to define pin muxing in device
tree. All STM32 will use the common macro to define pinmux. Furthermore, it
will make STM32 maintenance and integration of new SOC easier .
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Fix HSE frequency to 25Mhz for STM32H743 Eval Board
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add Timers and it sub-nodes into DT for stm32f746 family.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add lptimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Improve hardware description by adding a clock property to the device
node corresponding to the CA9 CPU core.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA7 cluster has a clocks property,
while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the CPU cores in the CA15 cluster have clocks properties.
Add the missing clocks properties for the CPU cores in the CA7 cluster
to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU cores are driven by the same clock.
Add the missing clocks properties to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve hardware description by adding a clock property to the device
node corresponding to the CA9 CPU core.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve hardware description by adding a clocks property to the device
node corresponding to the primary CA15 CPU core, which is for now the
only one described.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7794 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7793 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7792 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7791 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7790 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7743 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen1 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in DT of r8a7779 SoC.
As the driver does not match on "renesas,gpio-r8a7779" there
are some run-time considerations for this patch:
* When a resulting DTB is used with kernels newer than v4.14 this should
not have any run-time effect as renesas,rcar-gen1-gpio is matched by the
driver since commit dbd1dad2ab ("gpio: rcar: add gen[123] fallback
compatibility strings")
* However, when used with older kernels GPIO will be disabled as
no compat string match will be made by the driver.
The regression documented above for the new DTB with old kernel case
is acceptable in my opinion.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen1 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in DT of r8a7778 SoC.
As the driver does not match on "renesas,gpio-r8a7778" there
are some run-time considerations for this patch:
* When a resulting DTB is used with kernels newer than v4.14 this should
not have any run-time effect as renesas,rcar-gen1-gpio is matched by the
driver since commit dbd1dad2ab ("gpio: rcar: add gen[123] fallback
compatibility strings")
* However, when used with older kernels GPIO will be disabled as
no compat string match will be made by the driver.
The regression documented above for the new DTB with old kernel case
is acceptable in my opinion.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fix warnings like follows:
Warning (node_name_chars_strict): Character '_' not recommended in ...
Commit 8654cb8d03 ("dtc: update warning settings for new bus and
node/property name checks") says these checks are a bit subjective,
but Rob also says to not add new W=2 warnings.
The exising warnings should be fixed in order to catch new ones
easily.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC.
The thermal monitor node is included in sysctrl. Since the efuse might not
have a calibrated value of thermal monitor, this patch gives the default
value for PXs2.
Furthermore, add cpuN labels for reference in cooling-device property.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable thermal on rk3288-vyasa board, TSHUT is high active.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to i.MX7D reference manual (Rev. 0.1, table 7-1, page 1221)
legacy PCI interrupt mapping is as follows:
- PCIE INT A is IRQ 122
- PCIE INT B is IRQ 123
- PCIE INT C is IRQ 124
- PCIE INT D is IRQ 125
Invert the mapping information in corresponding DT node to reflect
that.
Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Fixes: a816d5750e ("ARM: dts: imx7d: Add node for PCIe controller")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.
The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current GPL only licensing on the dts file makes it very
impractical for other software components licensed under another
license.
In order to make it easier for them to reuse our device trees,
relicense our dts files first under a GPL/X11 dual-license.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1.
This also makes the code cleaner because 6q and 6dl actually have
different revision histories.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
If CONFIG_DEBUG_LOCK_ALLOC=y, the kernel log is spammed with a few
hundred identical messages:
unwind: Unknown symbol address c0800300
unwind: Index not found c0800300
c0800300 is the return address from the last subroutine call (to
__memzero()) in __mmap_switched(). Apparently having this address in
the link register confuses the unwinder.
To fix this, reset the link register to zero before jumping to
start_kernel().
Fixes: 9520b1a1b5 ("ARM: head-common.S: speed up startup code")
Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The arch timer configuration for a CPU might get reset after suspending
said CPU.
In order to reliably use the event stream in the kernel (e.g. for delays),
we keep track of the state where we can safely consider the event stream as
properly configured. After writing to cntkctl, we issue an ISB to ensure
that subsequent delay loops can rely on the event stream being enabled.
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Fix to return error code -EINVAL from the irq_of_parse_and_map() error
handling case instead of 0, as done elsewhere in this function.
Fixes: d85a2d6143 ("ARM: OMAP2+: Populate legacy resources for dma
and smartreflex")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As reported by Peter Ujfalusi <peter.ujfalusi@ti.com>, the rx path on macsp
is disabled and only tx is usable if the davinci-mcasp driver is updated for
it.
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Make sure (of/i2c/platform)_device_id tables are NULL terminated.
Found by coccinelle spatch "misc/of_table.cocci"
Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Contrary to later i.MX SoCs, the parallel display interface pad groups on
i.MX51 are called DISP1 and DISP2 in the Reference Manual, not DISP0 and
DISP1.
Fix this inconsistence by changing the DISP names in the i.mx51 dts.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warnings are seen with W=1:
Warning (unit_address_vs_reg): Node /display@di0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /display@di1 has a unit name, but no reg property
Fix all these warnings by changing 'display@diX' to 'dispX'.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The reference design tablet has the DC jack wired to AXP209's ACIN.
As a tablet, it also has an internal LiPo battery, wired to the PMIC's
battery charger.
Enable both.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Some boards have had node names with underscores. Remove them in favour of
hyphens in order to reduce the DTC warnings.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Some node names in the A80 DTSI still have underscores in them. Remove them
in favour of hyphens to remove DTC warnings.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Some GPIO pinctrl nodes cannot be easily removed, because they would also
change the pin configuration, for example to add a pull resistor or change
the current delivered by the pin.
Those nodes still have underscores and unit-addresses in their node names
in our DTs, so adjust their name to remove the warnings. Use that occasion
to also fix some poorly chosen node-names.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The I2C's, MMC0 and EMAC controllers have only one muxing option in the
SoC. In such a case, we can just move the muxing into the DTSI, and remove
it from the DTS.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
All our pinctrl nodes were using a node name convention with a unit-address
to differentiate the different muxing options. However, since those nodes
didn't have a reg property, they were generating warnings in DTC.
In order to accomodate for this, convert the old nodes to the syntax we've
been using for the new SoCs, including removing the letter suffix of the
node labels to the bank of those pins to make things more readable.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add support for the built-in touchscreen controller present on MX25.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
warning: no previous prototype for ‘mx31lite_map_io’
[-Wmissing-prototypes] void __init mx31lite_map_io(void)
This function is only used in this file so make it "static".
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
warning: no previous prototype for ‘imx5_cpuidle_init’
[-Wmissing-prototypes] int __init imx5_cpuidle_init(void)
Fix this warning by including "cpuidle.h".
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
warning: no previous prototype for ‘mxc_expio_init’
[-Wmissing-prototypes] int __init mxc_expio_init(u32 base, u32 intr_gpio)
Fix this warning by including "3ds_debugboard.h".
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warnings are seen with W=1:
warning: no previous prototype for ‘mx31moboard_devboard_init’
[-Wmissing-prototypes] void __init mx31moboard_devboard_init(void)
warning: no previous prototype for ‘mx31moboard_marxbot_init’
[-Wmissing-prototypes] void __init mx31moboard_marxbot_init(void)
Fix these warnings by including "board-mx31moboard.h".
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warnings are seen with W=1:
Warning (simple_bus_reg): Node /soc/sram@00900000 simple-bus unit
address format error, expected "900000"
Warning (simple_bus_reg): Node /soc/aips-bus@02000000 simple-bus unit
address format error, expected "2000000"
Warning (simple_bus_reg): Node /soc/aips-bus@02000000/pxp@020f0000
simple-bus unit address format error, expected "20f0000"
(...)
Remove the leading zeroes from unit addresses to fix the warnings.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warnings are seen with W=1:
Warning (unit_address_format): Node /interrupt-controller@00a01000 unit
name should not have leading 0s
Warning (simple_bus_reg): Node /soc/sram@00900000 simple-bus unit address
format error, expected "900000"
Warning (simple_bus_reg): Node /soc/dma-apbh@01804000 simple-bus unit
address format error, expected "1804000"
(...)
Remove the leading zeroes from unit addresses to fix the warnings.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On the Utilite Pro the CEC line is wired up to the HDMI connector.
Add the required pinctrl setting.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Select CONFIG_DRM_DW_HDMI_CEC option, so that the CEC driver can be
loaded by default.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
HDMI_TX_CEC_LINE pin is used for CEC, so pass it in the device tree.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit c26ebe98a1 ("PCI: imx6: Add regulator support"), it is
possible to pass the 'vpcie-supply' property to describe the PCIE supply.
This way we can remove the 'regulator-always-on' property from the
regulator and have a better device tree description.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for can1 and can2 nodes on Engicam i.CoreM6 RQS
QDL module boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
max11801 touchscreen on Engicam iCoreM6 DualLite/Solo module is
connected via i2c1, so add max11801: touchscreen@48 on i2c1.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch replace fsl,imx-audio-sgtl5000 and use simple-audio-card
for Engicam i.CoreM6 RQS QDL platform boards.
This patch also fix, pinctrl_adumux.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6q, imx6dl icore-rqs modules share common sound nodes,
so move the sound nodes from imx6q-icore-rqs into dtsi so-that
both can share the common node details.
And also replace codec: sgtl5000@0a => sgtl5000: codec@a
on imx6q-icore-rqs.dts to [label:] node-name[@unit-address]
according to devicetree specification from ePAPER v1.1
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Linux Sound card now uses generic simple-audio-card, so add
the same along with related audmux and codec(via u2c3) for
i.CoreM6 QDL module boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Turn on Broadcom Hurrican 2 SoC support by default to get access to its
drivers.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Broadcom Hurricane 2 SoCs typically use their secondary UART for
debug/console, provide a known good location for that.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add basic board support for the Ubiquiti UniFi Switch 8 port model. This
is a small home and office use managed switch based on the BCM53342
switching control SoC.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Describe the Broadcom Hurricane 2 SoC comprised of a Cortex-A9 CPU
complex along with standard iProc peripherals:
* timers
* SPI controller
* NAND controller
* a single AMAC (Ethernet MAC controller)
* dual PCIe controllers
The design is largely similar to existing iProc-based SoCs such as
Northstar Plus.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add a Kconfig entry point and basic machine board code for the Broadcom
Hurricane 2 SoCs used in switching products.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch fixes some spelling typos found in Kconfig files.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Enable ostm0 and ostm1 timers to be used as clock source and clockevent
source. The timers provides greater accuracy than the already enabled
mtu2 one.
With these enabled:
clocksource: ostm: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 57352151442 ns
sched_clock: 32 bits at 33MHz, resolution 30ns, wraps every 64440619504ns
ostm: used for clocksource
ostm: used for clock events
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Suggested-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds DMA properties to the HSUSB node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable HS-USB device for the iWave G20D-Q7 carrier board based on
RZ/G1M.
Also disable the host mode support on usb otg port by default to avoid
pin conflicts.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the R8A7743 generic part of the HS-USB device node. It is up to the
board file to enable the device.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
With printch() the console messages are sent out one character at a time
which is agonizingly slow especially with semihosting as the whole trap
intercept, remote byte access, and system resume danse is performed for
every single character across a relatively slow remote debug connection.
Let's use printascii() to send a whole string at once. This is also going
to be more efficient, albeit to a quite lesser extent, with serial ports
as well.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This was located in .text which is meant to be read-only. And in the XIP
case this shortcut simply doesn't work and may trigger a Flash controller
mode switch and crash the kernel. Move it to the .bss area.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
By default sparse uses the characteristics of the build
machine to infer things like the wordsize.
This is fine when doing native builds but for ARM it's,
I suspect, very rarely the case and if the build are done
on a 64bit machine we get a bunch of warnings like:
'cast truncates bits from constant value (... becomes ...)'
Fix this by adding the -m32 flags for sparse.
Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Some nommu systems have RAM at address 0. When vectors are not located
there, the very beginning of memory remains available for dynamic
allocations. The memblock allocator explicitly skips the first page
but the standard page allocator does not, and while it correctly returns
a non-null struct page pointer for that page, page_address() gives 0
which gets confused with NULL (out of memory) by callers despite having
plenty of free memory left.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the r8a7745 generic part of the USB PHY device node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The following 'capacity-dmips-mhz' dt property values are used:
Cortex-A15: 1024, Cortex-A7: 539
They have been derived form the cpu_efficiency values:
Cortex-A15: 3891, Cortex-A7: 2048
by scaling them so that the Cortex-A15s (big cores) use 1024.
The cpu_efficiency values were originally derived from the "Big.LITTLE
Processing with ARM Cortex™-A15 & Cortex-A7" white paper
(http://www.cl.cam.ac.uk/~rdm34/big.LITTLE.pdf). Table 1 lists 1.9x
(3891/2048) as the Cortex-A15 vs Cortex-A7 performance ratio for the
Dhrystone benchmark.
The following platform is affected once cpu-invariant accounting
support is re-connected to the task scheduler:
r8a7790-lager
Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables the new Amlogic Meson MX SDIO/MMC controller driver, which
typically connects to the SD card and SDIO wifi module.
The driver is enabled as built-in to allow booting from the SD card.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Meson6, Meson8 and Meson8b are using the same MMC controller IP. This
adds the MMC controller node to meson.dtsi so it can be used by all
SoCs.
The controller itself is a bit special, because it has multiple slots.
Each slot is accessed through a sub-node of the controller. However,
currently the driver for this hardware only supports one slot.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Remove pin offset on the AO controller. meson pinctrl no longer has
this quirk
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Select the options necessary to get USB, coincell, WiFI, touchscreen and
backlight on the Z2 Tablet (and other family B devices) working. The
device specific peripherals are selected as modules.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
GPIO debug spams the kernel log quite a bit, so remove this from the
default Qualcomm defconfig.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Enable the regulator driver, usb phy drivers, and hsic hub driver
to support USB devices on apq8064 and msm8974.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
CONFIG_HWSPINLOCK must be selected explicitly for SMEM and its
dependencies to be enabled.
The update is generated by "make savedefconfig" and as such reflects
changes to the implicit state of other options, as of v4.14-rc1.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This introduces the usb node which can be used e.g. for USB_ETH
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This introduces the eMMC sdhci node and its pinctrl state
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The voltages are pulled from the vendor source tree.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This introduces the gpio-keys nodes for keys of the FP2 and the
associated pinctrl state.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This DTS has support for the Fairphone 2 (codenamed FP2).
This first version of the DTS supports just the serial console via the
MSM UART pins.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the GSBI6 and GSBI7 IO blocks to the MSM8660 DTSI file.
On the APQ8060 DragonBoard, GSBI6 DM is used for Bluetooth UART,
and GSBI7 I2C is used for FM radio I2C.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds a basic DTS file for the Sony Xperia Z2 Tablet, containing
definitions for regulators, eMMC/SD-card, USB, WiFi, Touchscreen,
charger, backlight, coincell and buttons.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch marks gsbi i2c node at soc level dtsi, so that kernel
would not assume that its enabled and result in pin conflicts on
some boards like IFC6410 which do use these pins for uart.
Without this patch we see below pin conflict:
apq8064-pinctrl 800000.pinctrl: pin GPIO_16 already requested by
16540000.serial; cannot claim for 16580000.i2c
apq8064-pinctrl 800000.pinctrl: pin-16 (16580000.i2c) status -22
apq8064-pinctrl 800000.pinctrl: could not request pin 16 (GPIO_16)
from group gpio16 on device 800000.pinctrl
i2c_qup 16580000.i2c: Error applying setting, reverse things back
i2c_qup: probe of 16580000.i2c failed with error -22
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the necessary #phy-cells property to the DSI and HDMI
phys.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
* A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kcalloc".
This issue was detected by using the Coccinelle software.
* Replace the specification of a data type by a pointer dereference
to make the corresponding size determination a bit safer according to
the Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Replace the specification of data structures by pointer dereferences
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Omit extra messages for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The devicetree prefix mcp is deprecated in favour of microchip. Thus
this replaces mcp with microchip for the mcp23017 gpio expander chip.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move the pcie_rc node to common file so that it can be
used by dra76-evm as well.
Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per recent TRM, PBIAS cell on omap5 devices supports
3.3v and not 3.0v as documented earlier.
Update PBIAS regulator max voltage to match this.
Document reference:
SWPU249AF - OMAP543x Technical reference manual August 2016
Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per recent TRM, PBIAS cell on dra7 devices supports
3.3v and not 3.0v as documented earlier.
Update PBIAS regulator max voltage to match this.
Document reference:
SPRUI30C – DRA75x, DRA74x Technical reference manual- November 2016
Tested on:
DRA75x PG 2.0 REV H EVM
Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
All the A31/A31s devices I own have some kind of HDMI connector wired
to the dedicated HDMI pins on the SoC:
- A31 Hummingbird (standard HDMI connector, display already enabled)
- Sinlinx SinA31s (standard HDMI connector)
- MSI Primo81 tablet (micro HDMI connector)
Enable the display pipeline (if needed) and HDMI output for them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we support the HDMI controller on the A31 SoC, we can add it
to the device tree.
This adds a device node for the HDMI controller, and the of_graph nodes
connecting it to the 2 TCONs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A bugfix for the SMP case broke the build for the UP case:
arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu':
(.text+0x34): undefined reference to `secondary_startup'
The assembler file mixes code that is used for SMP with code
that we also need on a single-CPU build, so I'm leaving it
always enabled in the Makefile, but enclose the SMP code
in an #ifdef.
Fixes: fd45a136ff6 ("ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On some i.MX6 SoCs (like i.MX6SL, i.MX6SX and i.MX6UL) that do not have
speed grading check, opp table will not be created in platform code,
so cpufreq driver prints the following error message:
cpu cpu0: dev_pm_opp_get_opp_count: OPP table not found (-19)
However, this is not really an error in this case because the
imx6q-cpufreq driver first calls dev_pm_opp_get_opp_count()
and if it fails, it means that platform code does not provide
OPP and then dev_pm_opp_of_add_table() will be called.
In order to avoid such confusing error message, move the speed grading
check from platform code to the imx6q-cpufreq driver.
This way the imx6q-cpufreq no longer has to check whether OPP table
is supplied by platform code.
Tested on a i.MX6Q and i.MX6UL based boards.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
With all of mach-omap2 booting now in device tree only mode,
we can get the module IO range from device tree and just drop
the legacy hwmod struct omap_hwmod_addr_space.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We have all of mach-omap2 booting in device tree only
mode now, and this data is populated from device tree.
Note that once we have removed support for the omap legacy
DMA, we can also drop struct omap_dma_dev_attr.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the previous patches removing the need for legacy IRQs
now that all of mach-omap2 is booting in device tree only mode,
we can drop struct omap_hwmod_irq_info.
Note that we can now also finally drop omap4_xlate_irq.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We have the PRM IRQ mapped in device tree and this legacy code
is no longer needed.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We have this coming from device tree and legacy booting is
no longer needed.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can handle the sysc interconnect target module in a generic way
for many TI SoCs. Initially let's just enable runtime PM with
autosuspend, and probe the children. This can already be used for
idling interconnect target modules that don't have any device driver
available for the child devices.
For now, the "ti,hwmods" custom binding is still required. That will
be eventually deprecated in later patches. And more features will be
added, such as parsing for sysc capabilities so we can continue
removing the legacy platform data.
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Sakari Ailus <sakari.ailus@iki.fi>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can populate the legacy resources needed by dma and smartreflex
from device tree in omap_device_build().
There should be no need to do this for other devices, and eventually
these two remaining users will be gone too. The legacy dma will be
dropped when the remaining users have been converted to use the
dmaengine driver, and smartreflex can now become just a regular
device driver with a few pdata callbacks.
This is needed in order to remove remaining device dma, irq and io
resources from the interconnect code.
And while at it, let's simplify things by removing otherwise
unused omap_device_build_ss() as we will never call it for more
than one hwmod.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When removing legacy platform data for IO ranges for the hwmod
interconnect code, we still need to support the "ti,hwmods"
property.
And as we're going to use a generic sysc device driver to handle the
interconnect target instances, we can parse the information needed
for legacy "ti,hwmods" IO range from the dts. It's always the first
range the interconnect target module provides.
Note that we want to parse the range instead of the first child
device IO regs as the child device may not always be defined.
The child IP device node may not exist in cases where there is no
driver binding for the device, or when the child IP block may not
even be functional for some SoC revisions. But the IO range of the
interconnect target module is always known.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The TRM has marked dra7 SmartReflex as reserved and we should not
touch those registers as pointed out by Nishanth Menon <nm@ti.com>.
We do still want to idle the related interconnect target modules on
init though.
Let's do this by only configuring the generic interconnect target modules
and not add the child SmartReflex devices.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On omap4 we are missing dts nodes for several interconnect target
modules that we are idling on init. This currently works with the
legacy platform data still around.
To fix this, let's add the interconnect target modules so we can
idle the unused interconnect target module on init.
Also note that adding the interconnect target module node does not
necessarily mean that there is a driver available for the child IP
block, or that the child IP block is even functional.
In the SGX case, the PowerVR driver is closed source. And McASP on
omap4 has at least the TX path disabled and is not supported by the
davinci-mcasp driver. For AESS there is old Android 3.4 kernel
driver available.
For smarflex, we are still probing with platform data and the
driver needs more work before we can add the device ip child nodes.
And finally, we're not yet using the interconnet ranges. I will
be posting separate patches for those later on.
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sakari Ailus <sakari.ailus@iki.fi>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
K2G EVM has n25q128a13 SPI NOR flash on SPI1. Enable SPI1 in the DT
node as well as add a subnode for the SPI NOR.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add nodes for the various SPI instances.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Enable PWM ECAP0 which will be used for display backlight.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Enable USB 0 which will be used as a host port and USB 1 which will be
used in peripheral mode.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add nodes for both USB instances supported by 66AK2G.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
K2G EVM has an onboard I2C EEPROM connected to I2C0. This patch adds
the necessary DT entry for the AT24CM01 EEPROM.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add nodes for the various I2C instances.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Use DMA for USART0 (which is used as ttyS1) as we have enough channels and to
show how to specify DMA use with serial nodes.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add the PWM0 interface and one output of channel 0 (on PC10) on this headless
board. The output conflicts with LCD and ISI, so only enable it for this
particular board of the series (ISI is enabled on at91sam9g25ek, as an example
but we can do the other way around).
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
As the CAN1 interface is not multiplexed with other peripherals on this
board, enable it so that it can be tested more easily.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
As the board have the proper pull-ups soldered on the data and CMD
lines we don't need them specified in the PADs. So remove the
"bias-pull-up" property and set "bias-disable".
This will also save some power.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add pin muxing for pwm0 and set it as disabled since it is in conflict
with pins for leds.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Set the PB_USER button as a wakeup source to resume from ulp0 mode.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
As the board have the proper pull-ups soldered on the data
and CMD lines we don't need them specified in the PADs. So remove
the "bias-pull-up" property and set "bias-disable".
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
CAN0 is not connected on the sama5d27_som1_ek board, so remove
it from DT.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add pin muxing for pwm0 and set it as disabled since it is in conflict
with the pins for leds.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Set the USER button as a wakeup source to allow wakeup from ULP0.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Overwrite sama5d2.dtsi aliases node to match the at91-sama5d27_som1_ek
board configuration. ttyS0 stands for DBGU, ttyS1 for the mikro BUS 1
serial lines and ttyS2 for the mikro BUS 2 serial lines.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add disabled statuses for all devices and for those those which pins
are in conflict with other devices add a comment in the DT file to specify
this.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The arch_{read,spin,write}_lock_flags() macros are simply mapped to the
non-flags versions by the majority of architectures, so do this in core
code and remove the dummy implementations. Also remove the implementation
in spinlock_up.h, since all callers of do_raw_spin_lock_flags() call
local_irq_save(flags) anyway.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: paulmck@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/1507055129-12300-4-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch_{read,spin,write}_relax() are defined as cpu_relax() by the core
code, so architectures that can't do better (i.e. most of them) don't
need to bother with the dummy definitions.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: paulmck@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/1507055129-12300-3-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Outside of the locking code itself, {read,spin,write}_can_lock() have no
users in tree. Apparmor (the last remaining user of write_can_lock()) got
moved over to lockdep by the previous patch.
This patch removes the use of {read,spin,write}_can_lock() from the
BUILD_LOCK_OPS macro, deferring to the trylock operation for testing the
lock status, and subsequently removes the unused macros altogether. They
aren't guaranteed to work in a concurrent environment and can give
incorrect results in the case of qrwlock.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: paulmck@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/1507055129-12300-2-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The interrupts were wrongly named as ppXmmu while the binding
specifies them as ppmmuX.
Fix that for the recently added Utgard mali nodes on Rockchip socs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This is BCM53573 WiSoC based outdoor access point with an extra BCM43217
chipset used for 2.4 GHz.
Signed-off-by: Dan Haab <dhaab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This is BCM53573 WiSoC based access point with an extra BCM43217 chipset
used for 2.4 GHz.
Signed-off-by: Dan Haab <dhaab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This is BCM47094 (AKA BCM4709C0) based router with rear-facing ports
board design.
Signed-off-by: Dan Haab <dhaab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This is BCM47094 (AKA BCM4709C0) based router with ports-on-the-front
board design.
Signed-off-by: Dan Haab <dhaab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add HDMI and Sil9234 MHL converter to Trats2 board.
Following in SoC devices have been enabled:
- HDMI (HDMI signal encoder),
- Mixer (video buffer scanout device),
- I2C_5 bus (used for HDMI DDC)
- I2C_8 bus (used for HDMI_PHY control).
Based on previous work by:
Tomasz Stanislawski <t.stanislaws@samsung.com>
Signed-off-by: Maciej Purski <m.purski@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Enable PWM_TIECAP driver to support ECAP IP present in 66AK2G SoC.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
