License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 21:07:57 +07:00
|
|
|
// SPDX-License-Identifier: GPL-2.0
|
2011-07-20 06:26:54 +07:00
|
|
|
/dts-v1/;
|
|
|
|
|
|
2013-12-02 20:09:57 +07:00
|
|
|
#include <dt-bindings/input/input.h>
|
2012-10-18 05:38:21 +07:00
|
|
|
#include "tegra20.dtsi"
|
2011-07-20 06:26:54 +07:00
|
|
|
|
|
|
|
|
/ {
|
|
|
|
|
model = "NVIDIA Seaboard";
|
|
|
|
|
compatible = "nvidia,seaboard", "nvidia,tegra20";
|
|
|
|
|
|
2013-12-10 04:43:59 +07:00
|
|
|
aliases {
|
|
|
|
|
rtc0 = "/i2c@7000d000/tps6586x@34";
|
|
|
|
|
rtc1 = "/rtc@7000e000";
|
2014-11-12 03:49:30 +07:00
|
|
|
serial0 = &uartd;
|
2013-12-10 04:43:59 +07:00
|
|
|
};
|
|
|
|
|
|
2016-02-09 20:51:59 +07:00
|
|
|
chosen {
|
|
|
|
|
stdout-path = "serial0:115200n8";
|
|
|
|
|
};
|
|
|
|
|
|
2018-07-09 23:05:17 +07:00
|
|
|
memory@0 {
|
2012-05-12 05:11:38 +07:00
|
|
|
reg = <0x00000000 0x40000000>;
|
2011-07-20 06:26:54 +07:00
|
|
|
};
|
|
|
|
|
|
2013-11-26 07:53:16 +07:00
|
|
|
host1x@50000000 {
|
2014-01-08 06:16:32 +07:00
|
|
|
dc@54200000 {
|
|
|
|
|
rgb {
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
nvidia,panel = <&panel>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2013-11-26 07:53:16 +07:00
|
|
|
hdmi@54280000 {
|
2013-01-03 04:53:20 +07:00
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
vdd-supply = <&hdmi_vdd_reg>;
|
|
|
|
|
pll-supply = <&hdmi_pll_reg>;
|
2015-04-24 16:57:06 +07:00
|
|
|
hdmi-supply = <&vdd_hdmi>;
|
2013-01-03 04:53:20 +07:00
|
|
|
|
|
|
|
|
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
|
2013-02-13 07:25:15 +07:00
|
|
|
nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
|
|
|
|
|
GPIO_ACTIVE_HIGH>;
|
2013-01-03 04:53:20 +07:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2013-11-26 07:53:16 +07:00
|
|
|
pinmux@70000014 {
|
2012-03-16 05:27:36 +07:00
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&state_default>;
|
|
|
|
|
|
|
|
|
|
state_default: pinmux {
|
|
|
|
|
ata {
|
|
|
|
|
nvidia,pins = "ata";
|
|
|
|
|
nvidia,function = "ide";
|
|
|
|
|
};
|
|
|
|
|
atb {
|
|
|
|
|
nvidia,pins = "atb", "gma", "gme";
|
|
|
|
|
nvidia,function = "sdio4";
|
|
|
|
|
};
|
|
|
|
|
atc {
|
|
|
|
|
nvidia,pins = "atc";
|
|
|
|
|
nvidia,function = "nand";
|
|
|
|
|
};
|
|
|
|
|
atd {
|
|
|
|
|
nvidia,pins = "atd", "ate", "gmb", "spia",
|
|
|
|
|
"spib", "spic";
|
|
|
|
|
nvidia,function = "gmi";
|
|
|
|
|
};
|
|
|
|
|
cdev1 {
|
|
|
|
|
nvidia,pins = "cdev1";
|
|
|
|
|
nvidia,function = "plla_out";
|
|
|
|
|
};
|
|
|
|
|
cdev2 {
|
|
|
|
|
nvidia,pins = "cdev2";
|
|
|
|
|
nvidia,function = "pllp_out4";
|
|
|
|
|
};
|
|
|
|
|
crtp {
|
|
|
|
|
nvidia,pins = "crtp", "lm1";
|
|
|
|
|
nvidia,function = "crt";
|
|
|
|
|
};
|
|
|
|
|
csus {
|
|
|
|
|
nvidia,pins = "csus";
|
|
|
|
|
nvidia,function = "vi_sensor_clk";
|
|
|
|
|
};
|
|
|
|
|
dap1 {
|
|
|
|
|
nvidia,pins = "dap1";
|
|
|
|
|
nvidia,function = "dap1";
|
|
|
|
|
};
|
|
|
|
|
dap2 {
|
|
|
|
|
nvidia,pins = "dap2";
|
|
|
|
|
nvidia,function = "dap2";
|
|
|
|
|
};
|
|
|
|
|
dap3 {
|
|
|
|
|
nvidia,pins = "dap3";
|
|
|
|
|
nvidia,function = "dap3";
|
|
|
|
|
};
|
|
|
|
|
dap4 {
|
|
|
|
|
nvidia,pins = "dap4";
|
|
|
|
|
nvidia,function = "dap4";
|
|
|
|
|
};
|
|
|
|
|
dta {
|
|
|
|
|
nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
|
|
|
|
|
nvidia,function = "vi";
|
|
|
|
|
};
|
|
|
|
|
dtf {
|
|
|
|
|
nvidia,pins = "dtf";
|
|
|
|
|
nvidia,function = "i2c3";
|
|
|
|
|
};
|
|
|
|
|
gmc {
|
|
|
|
|
nvidia,pins = "gmc";
|
|
|
|
|
nvidia,function = "uartd";
|
|
|
|
|
};
|
|
|
|
|
gmd {
|
|
|
|
|
nvidia,pins = "gmd";
|
|
|
|
|
nvidia,function = "sflash";
|
|
|
|
|
};
|
|
|
|
|
gpu {
|
|
|
|
|
nvidia,pins = "gpu";
|
|
|
|
|
nvidia,function = "pwm";
|
|
|
|
|
};
|
|
|
|
|
gpu7 {
|
|
|
|
|
nvidia,pins = "gpu7";
|
|
|
|
|
nvidia,function = "rtck";
|
|
|
|
|
};
|
|
|
|
|
gpv {
|
|
|
|
|
nvidia,pins = "gpv", "slxa", "slxk";
|
|
|
|
|
nvidia,function = "pcie";
|
|
|
|
|
};
|
|
|
|
|
hdint {
|
|
|
|
|
nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
|
2012-04-27 00:21:54 +07:00
|
|
|
"lsck", "lsda";
|
2012-03-16 05:27:36 +07:00
|
|
|
nvidia,function = "hdmi";
|
|
|
|
|
};
|
|
|
|
|
i2cp {
|
|
|
|
|
nvidia,pins = "i2cp";
|
|
|
|
|
nvidia,function = "i2cp";
|
|
|
|
|
};
|
|
|
|
|
irrx {
|
|
|
|
|
nvidia,pins = "irrx", "irtx";
|
|
|
|
|
nvidia,function = "uartb";
|
|
|
|
|
};
|
|
|
|
|
kbca {
|
|
|
|
|
nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
|
|
|
|
|
"kbce", "kbcf";
|
|
|
|
|
nvidia,function = "kbc";
|
|
|
|
|
};
|
|
|
|
|
lcsn {
|
|
|
|
|
nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
|
|
|
|
|
"lsdi", "lvp0";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
ld0 {
|
|
|
|
|
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
|
|
|
|
|
"ld5", "ld6", "ld7", "ld8", "ld9",
|
|
|
|
|
"ld10", "ld11", "ld12", "ld13", "ld14",
|
|
|
|
|
"ld15", "ld16", "ld17", "ldi", "lhp0",
|
|
|
|
|
"lhp1", "lhp2", "lhs", "lpp", "lsc0",
|
|
|
|
|
"lspi", "lvp1", "lvs";
|
|
|
|
|
nvidia,function = "displaya";
|
|
|
|
|
};
|
2012-04-17 06:41:17 +07:00
|
|
|
owc {
|
|
|
|
|
nvidia,pins = "owc", "spdi", "spdo", "uac";
|
|
|
|
|
nvidia,function = "rsvd2";
|
|
|
|
|
};
|
2012-03-16 05:27:36 +07:00
|
|
|
pmc {
|
|
|
|
|
nvidia,pins = "pmc";
|
|
|
|
|
nvidia,function = "pwr_on";
|
|
|
|
|
};
|
|
|
|
|
rm {
|
|
|
|
|
nvidia,pins = "rm";
|
|
|
|
|
nvidia,function = "i2c1";
|
|
|
|
|
};
|
|
|
|
|
sdb {
|
|
|
|
|
nvidia,pins = "sdb", "sdc", "sdd";
|
|
|
|
|
nvidia,function = "sdio3";
|
|
|
|
|
};
|
|
|
|
|
sdio1 {
|
|
|
|
|
nvidia,pins = "sdio1";
|
|
|
|
|
nvidia,function = "sdio1";
|
|
|
|
|
};
|
|
|
|
|
slxc {
|
|
|
|
|
nvidia,pins = "slxc", "slxd";
|
|
|
|
|
nvidia,function = "spdif";
|
|
|
|
|
};
|
|
|
|
|
spid {
|
|
|
|
|
nvidia,pins = "spid", "spie", "spif";
|
|
|
|
|
nvidia,function = "spi1";
|
|
|
|
|
};
|
|
|
|
|
spig {
|
|
|
|
|
nvidia,pins = "spig", "spih";
|
|
|
|
|
nvidia,function = "spi2_alt";
|
|
|
|
|
};
|
|
|
|
|
uaa {
|
|
|
|
|
nvidia,pins = "uaa", "uab", "uda";
|
|
|
|
|
nvidia,function = "ulpi";
|
|
|
|
|
};
|
|
|
|
|
uad {
|
|
|
|
|
nvidia,pins = "uad";
|
|
|
|
|
nvidia,function = "irda";
|
|
|
|
|
};
|
|
|
|
|
uca {
|
|
|
|
|
nvidia,pins = "uca", "ucb";
|
|
|
|
|
nvidia,function = "uartc";
|
|
|
|
|
};
|
|
|
|
|
conf_ata {
|
|
|
|
|
nvidia,pins = "ata", "atb", "atc", "atd",
|
|
|
|
|
"cdev1", "cdev2", "dap1", "dap2",
|
2012-04-17 06:41:17 +07:00
|
|
|
"dap4", "ddc", "dtf", "gma", "gmc", "gmd",
|
2012-03-16 05:27:36 +07:00
|
|
|
"gme", "gpu", "gpu7", "i2cp", "irrx",
|
|
|
|
|
"irtx", "pta", "rm", "sdc", "sdd",
|
|
|
|
|
"slxd", "slxk", "spdi", "spdo", "uac",
|
|
|
|
|
"uad", "uca", "ucb", "uda";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_ate {
|
2012-04-17 06:41:17 +07:00
|
|
|
nvidia,pins = "ate", "csus", "dap3",
|
2012-03-16 05:27:36 +07:00
|
|
|
"gpv", "owc", "slxc", "spib", "spid",
|
|
|
|
|
"spie";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_ck32 {
|
|
|
|
|
nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
|
|
|
|
|
"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_crtp {
|
|
|
|
|
nvidia,pins = "crtp", "gmb", "slxa", "spia",
|
|
|
|
|
"spig", "spih";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_dta {
|
|
|
|
|
nvidia,pins = "dta", "dtb", "dtc", "dtd";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_dte {
|
|
|
|
|
nvidia,pins = "dte", "spif";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_hdint {
|
|
|
|
|
nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
|
|
|
|
|
"lpw1", "lsc1", "lsck", "lsda", "lsdi",
|
|
|
|
|
"lvp0";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_kbca {
|
|
|
|
|
nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
|
|
|
|
|
"kbce", "kbcf", "sdio1", "spic", "uaa",
|
|
|
|
|
"uab";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_lc {
|
|
|
|
|
nvidia,pins = "lc", "ls";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_ld0 {
|
|
|
|
|
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
|
|
|
|
|
"ld5", "ld6", "ld7", "ld8", "ld9",
|
|
|
|
|
"ld10", "ld11", "ld12", "ld13", "ld14",
|
|
|
|
|
"ld15", "ld16", "ld17", "ldi", "lhp0",
|
|
|
|
|
"lhp1", "lhp2", "lhs", "lm0", "lpp",
|
|
|
|
|
"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
|
|
|
|
|
"lvs", "pmc", "sdb";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
conf_ld17_0 {
|
|
|
|
|
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
|
|
|
|
|
"ld23_22";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
drive_sdio1 {
|
|
|
|
|
nvidia,pins = "drive_sdio1";
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
2012-03-16 05:27:36 +07:00
|
|
|
nvidia,pull-down-strength = <31>;
|
|
|
|
|
nvidia,pull-up-strength = <31>;
|
2013-12-05 17:44:08 +07:00
|
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
|
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
};
|
2012-04-17 06:41:17 +07:00
|
|
|
|
|
|
|
|
state_i2cmux_ddc: pinmux_i2cmux_ddc {
|
|
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "i2c2";
|
|
|
|
|
};
|
|
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
state_i2cmux_pta: pinmux_i2cmux_pta {
|
|
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
|
|
|
|
nvidia,function = "i2c2";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
state_i2cmux_idle: pinmux_i2cmux_idle {
|
|
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
};
|
2012-03-16 05:27:36 +07:00
|
|
|
};
|
|
|
|
|
|
2012-05-12 06:32:56 +07:00
|
|
|
i2s@70002800 {
|
|
|
|
|
status = "okay";
|
2012-05-12 06:03:26 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
serial@70006300 {
|
2012-05-12 06:32:56 +07:00
|
|
|
status = "okay";
|
2012-05-12 06:03:26 +07:00
|
|
|
};
|
|
|
|
|
|
2014-01-08 06:16:32 +07:00
|
|
|
pwm: pwm@7000a000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2011-11-22 04:44:09 +07:00
|
|
|
i2c@7000c000 {
|
2012-05-12 06:32:56 +07:00
|
|
|
status = "okay";
|
2011-11-22 04:44:09 +07:00
|
|
|
clock-frequency = <400000>;
|
2012-01-12 06:09:57 +07:00
|
|
|
|
|
|
|
|
wm8903: wm8903@1a {
|
|
|
|
|
compatible = "wlf,wm8903";
|
|
|
|
|
reg = <0x1a>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
2013-02-14 02:51:51 +07:00
|
|
|
interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
|
2012-01-12 06:09:57 +07:00
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
|
|
micdet-cfg = <0>;
|
|
|
|
|
micdet-delay = <100>;
|
2012-05-12 05:11:38 +07:00
|
|
|
gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
|
2012-01-12 06:09:57 +07:00
|
|
|
};
|
2012-04-23 19:11:36 +07:00
|
|
|
|
|
|
|
|
/* ALS and proximity sensor */
|
|
|
|
|
isl29018@44 {
|
|
|
|
|
compatible = "isil,isl29018";
|
|
|
|
|
reg = <0x44>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
2013-02-14 02:51:51 +07:00
|
|
|
interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
|
2012-04-23 19:11:36 +07:00
|
|
|
};
|
2011-12-22 23:33:13 +07:00
|
|
|
|
|
|
|
|
gyrometer@68 {
|
|
|
|
|
compatible = "invn,mpu3050";
|
|
|
|
|
reg = <0x68>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
2013-02-14 02:51:51 +07:00
|
|
|
interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
|
2011-12-22 23:33:13 +07:00
|
|
|
};
|
2011-11-22 04:44:09 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000c400 {
|
2012-05-12 06:32:56 +07:00
|
|
|
status = "okay";
|
2012-04-27 00:19:03 +07:00
|
|
|
clock-frequency = <100000>;
|
2011-11-22 04:44:09 +07:00
|
|
|
};
|
|
|
|
|
|
2012-04-17 06:41:17 +07:00
|
|
|
i2cmux {
|
|
|
|
|
compatible = "i2c-mux-pinctrl";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
i2c-parent = <&{/i2c@7000c400}>;
|
|
|
|
|
|
|
|
|
|
pinctrl-names = "ddc", "pta", "idle";
|
|
|
|
|
pinctrl-0 = <&state_i2cmux_ddc>;
|
|
|
|
|
pinctrl-1 = <&state_i2cmux_pta>;
|
|
|
|
|
pinctrl-2 = <&state_i2cmux_idle>;
|
|
|
|
|
|
2013-01-03 04:53:20 +07:00
|
|
|
hdmi_ddc: i2c@0 {
|
2012-04-17 06:41:17 +07:00
|
|
|
reg = <0>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
2014-01-08 06:16:32 +07:00
|
|
|
lvds_ddc: i2c@1 {
|
2012-04-17 06:41:17 +07:00
|
|
|
reg = <1>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
2012-04-26 05:57:28 +07:00
|
|
|
|
|
|
|
|
smart-battery@b {
|
|
|
|
|
compatible = "ti,bq20z75", "smart-battery-1.1";
|
|
|
|
|
reg = <0xb>;
|
|
|
|
|
ti,i2c-retry-count = <2>;
|
|
|
|
|
ti,poll-retry-count = <10>;
|
|
|
|
|
};
|
2012-04-17 06:41:17 +07:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2011-11-22 04:44:09 +07:00
|
|
|
i2c@7000c500 {
|
2012-05-12 06:32:56 +07:00
|
|
|
status = "okay";
|
2011-11-22 04:44:09 +07:00
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000d000 {
|
2012-05-12 06:32:56 +07:00
|
|
|
status = "okay";
|
2011-11-22 04:44:09 +07:00
|
|
|
clock-frequency = <400000>;
|
2011-12-18 13:29:32 +07:00
|
|
|
|
2013-11-27 04:43:45 +07:00
|
|
|
magnetometer@c {
|
of: replace Asahi Kasei Corp vendor prefix
Current vendor-prefixes.txt already has "ak" prefix for Asahi Kasei Corp
by ae8c4209af2c(of: Add vendor prefix for Asahi Kasei Corp.)
It went through the appropriate review process. But, almost all
Asahi Kasei chip drivers are using "asahi-kasei" prefix today.
(arch/arm/boot/dts/tegra20-seaboard.dts only is using "ak,ak8975",
but there are instances of "asahi-kasei,ak8975" in other dts files.
And drivers/iio/magnetometer/ak8975.c doesn't support "ak,ak8975" prefix)
So, we made a mistake there.
In addition, checkpatch.pl reports WARNING if it is using "asahi-kasei"
prerfix in DT file.
(DT compatible string vendor "asahi-kasei" appears un-documented)
Marking it deprecated and warning with checkpatch is certainly
preferable. So, this patch replace "ak" to "asahi-kasei" in
vendor-prefixes.txt. (and fixup tegra20-seaboard)
OTOH, Asahi Kasei is usually referred to as "AKM", but this patch
doesn't care about it. Because no DT is using that today.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2014-12-25 10:55:52 +07:00
|
|
|
compatible = "asahi-kasei,ak8975";
|
2013-11-27 04:43:45 +07:00
|
|
|
reg = <0xc>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-06-21 04:58:34 +07:00
|
|
|
pmic: tps6586x@34 {
|
|
|
|
|
compatible = "ti,tps6586x";
|
|
|
|
|
reg = <0x34>;
|
2013-02-14 02:51:51 +07:00
|
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
2012-06-21 04:58:34 +07:00
|
|
|
|
2012-09-12 00:42:26 +07:00
|
|
|
ti,system-power-controller;
|
|
|
|
|
|
2012-06-21 04:58:34 +07:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
|
|
|
|
|
sys-supply = <&vdd_5v0_reg>;
|
|
|
|
|
vin-sm0-supply = <&sys_reg>;
|
|
|
|
|
vin-sm1-supply = <&sys_reg>;
|
|
|
|
|
vin-sm2-supply = <&sys_reg>;
|
|
|
|
|
vinldo01-supply = <&sm2_reg>;
|
|
|
|
|
vinldo23-supply = <&sm2_reg>;
|
|
|
|
|
vinldo4-supply = <&sm2_reg>;
|
|
|
|
|
vinldo678-supply = <&sm2_reg>;
|
|
|
|
|
vinldo9-supply = <&sm2_reg>;
|
|
|
|
|
|
|
|
|
|
regulators {
|
2012-09-21 06:04:06 +07:00
|
|
|
sys_reg: sys {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_sys";
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
sm0 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_sm0,vdd_core";
|
|
|
|
|
regulator-min-microvolt = <1300000>;
|
|
|
|
|
regulator-max-microvolt = <1300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
sm1 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_sm1,vdd_cpu";
|
|
|
|
|
regulator-min-microvolt = <1125000>;
|
|
|
|
|
regulator-max-microvolt = <1125000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
sm2_reg: sm2 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_sm2,vin_ldo*";
|
|
|
|
|
regulator-min-microvolt = <3700000>;
|
|
|
|
|
regulator-max-microvolt = <3700000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* LDO0 is not connected to anything */
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
ldo1 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo1,avdd_pll*";
|
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
ldo2 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo2,vdd_rtc";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
ldo3 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo3,avdd_usb*";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
ldo4 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
ldo5 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo5,vcore_mmc";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
ldo6 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
2013-01-03 04:53:20 +07:00
|
|
|
hdmi_vdd_reg: ldo7 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
};
|
|
|
|
|
|
2013-01-03 04:53:20 +07:00
|
|
|
hdmi_pll_reg: ldo8 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
ldo9 {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 06:04:06 +07:00
|
|
|
ldo_rtc {
|
2012-06-21 04:58:34 +07:00
|
|
|
regulator-name = "vdd_rtc_out,vdd_cell";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2011-12-22 23:33:13 +07:00
|
|
|
temperature-sensor@4c {
|
2012-11-20 05:34:44 +07:00
|
|
|
compatible = "onnn,nct1008";
|
2011-12-18 13:29:32 +07:00
|
|
|
reg = <0x4c>;
|
|
|
|
|
};
|
2011-12-18 12:18:23 +07:00
|
|
|
};
|
2011-10-19 01:06:06 +07:00
|
|
|
|
2013-11-26 07:53:16 +07:00
|
|
|
kbc@7000e200 {
|
2013-01-15 14:24:49 +07:00
|
|
|
status = "okay";
|
|
|
|
|
nvidia,debounce-delay-ms = <32>;
|
|
|
|
|
nvidia,repeat-delay-ms = <160>;
|
|
|
|
|
nvidia,ghost-filter;
|
|
|
|
|
nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
|
|
|
|
|
nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
|
2013-12-02 20:09:57 +07:00
|
|
|
linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
|
|
|
|
|
MATRIX_KEY(0x00, 0x03, KEY_S)
|
|
|
|
|
MATRIX_KEY(0x00, 0x04, KEY_A)
|
|
|
|
|
MATRIX_KEY(0x00, 0x05, KEY_Z)
|
|
|
|
|
MATRIX_KEY(0x00, 0x07, KEY_FN)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
|
|
|
|
|
MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
|
|
|
|
|
MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x03, 0x00, KEY_5)
|
|
|
|
|
MATRIX_KEY(0x03, 0x01, KEY_4)
|
|
|
|
|
MATRIX_KEY(0x03, 0x02, KEY_R)
|
|
|
|
|
MATRIX_KEY(0x03, 0x03, KEY_E)
|
|
|
|
|
MATRIX_KEY(0x03, 0x04, KEY_F)
|
|
|
|
|
MATRIX_KEY(0x03, 0x05, KEY_D)
|
|
|
|
|
MATRIX_KEY(0x03, 0x06, KEY_X)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x04, 0x00, KEY_7)
|
|
|
|
|
MATRIX_KEY(0x04, 0x01, KEY_6)
|
|
|
|
|
MATRIX_KEY(0x04, 0x02, KEY_T)
|
|
|
|
|
MATRIX_KEY(0x04, 0x03, KEY_H)
|
|
|
|
|
MATRIX_KEY(0x04, 0x04, KEY_G)
|
|
|
|
|
MATRIX_KEY(0x04, 0x05, KEY_V)
|
|
|
|
|
MATRIX_KEY(0x04, 0x06, KEY_C)
|
|
|
|
|
MATRIX_KEY(0x04, 0x07, KEY_SPACE)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x05, 0x00, KEY_9)
|
|
|
|
|
MATRIX_KEY(0x05, 0x01, KEY_8)
|
|
|
|
|
MATRIX_KEY(0x05, 0x02, KEY_U)
|
|
|
|
|
MATRIX_KEY(0x05, 0x03, KEY_Y)
|
|
|
|
|
MATRIX_KEY(0x05, 0x04, KEY_J)
|
|
|
|
|
MATRIX_KEY(0x05, 0x05, KEY_N)
|
|
|
|
|
MATRIX_KEY(0x05, 0x06, KEY_B)
|
|
|
|
|
MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x06, 0x00, KEY_MINUS)
|
|
|
|
|
MATRIX_KEY(0x06, 0x01, KEY_0)
|
|
|
|
|
MATRIX_KEY(0x06, 0x02, KEY_O)
|
|
|
|
|
MATRIX_KEY(0x06, 0x03, KEY_I)
|
|
|
|
|
MATRIX_KEY(0x06, 0x04, KEY_L)
|
|
|
|
|
MATRIX_KEY(0x06, 0x05, KEY_K)
|
|
|
|
|
MATRIX_KEY(0x06, 0x06, KEY_COMMA)
|
|
|
|
|
MATRIX_KEY(0x06, 0x07, KEY_M)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
|
|
|
|
|
MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
|
|
|
|
|
MATRIX_KEY(0x07, 0x03, KEY_ENTER)
|
|
|
|
|
MATRIX_KEY(0x07, 0x07, KEY_MENU)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
|
|
|
|
|
MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
|
|
|
|
|
MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
|
|
|
|
|
MATRIX_KEY(0x0B, 0x01, KEY_P)
|
|
|
|
|
MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
|
|
|
|
|
MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
|
|
|
|
|
MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
|
|
|
|
|
MATRIX_KEY(0x0B, 0x05, KEY_DOT)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x0C, 0x00, KEY_F10)
|
|
|
|
|
MATRIX_KEY(0x0C, 0x01, KEY_F9)
|
|
|
|
|
MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
|
|
|
|
|
MATRIX_KEY(0x0C, 0x03, KEY_3)
|
|
|
|
|
MATRIX_KEY(0x0C, 0x04, KEY_2)
|
|
|
|
|
MATRIX_KEY(0x0C, 0x05, KEY_UP)
|
|
|
|
|
MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
|
|
|
|
|
MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
|
|
|
|
|
MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
|
|
|
|
|
MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
|
|
|
|
|
MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
|
|
|
|
|
MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
|
|
|
|
|
MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
|
|
|
|
|
MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x0E, 0x00, KEY_F11)
|
|
|
|
|
MATRIX_KEY(0x0E, 0x01, KEY_F12)
|
|
|
|
|
MATRIX_KEY(0x0E, 0x02, KEY_F8)
|
|
|
|
|
MATRIX_KEY(0x0E, 0x03, KEY_Q)
|
|
|
|
|
MATRIX_KEY(0x0E, 0x04, KEY_F4)
|
|
|
|
|
MATRIX_KEY(0x0E, 0x05, KEY_F3)
|
|
|
|
|
MATRIX_KEY(0x0E, 0x06, KEY_1)
|
|
|
|
|
MATRIX_KEY(0x0E, 0x07, KEY_F7)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x0F, 0x00, KEY_ESC)
|
|
|
|
|
MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
|
|
|
|
|
MATRIX_KEY(0x0F, 0x02, KEY_F5)
|
|
|
|
|
MATRIX_KEY(0x0F, 0x03, KEY_TAB)
|
|
|
|
|
MATRIX_KEY(0x0F, 0x04, KEY_F1)
|
|
|
|
|
MATRIX_KEY(0x0F, 0x05, KEY_F2)
|
|
|
|
|
MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
|
|
|
|
|
MATRIX_KEY(0x0F, 0x07, KEY_F6)
|
2013-01-15 14:24:49 +07:00
|
|
|
|
|
|
|
|
/* Software Handled Function Keys */
|
2013-12-02 20:09:57 +07:00
|
|
|
MATRIX_KEY(0x14, 0x00, KEY_KP7)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x15, 0x00, KEY_KP9)
|
|
|
|
|
MATRIX_KEY(0x15, 0x01, KEY_KP8)
|
|
|
|
|
MATRIX_KEY(0x15, 0x02, KEY_KP4)
|
|
|
|
|
MATRIX_KEY(0x15, 0x04, KEY_KP1)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
|
|
|
|
|
MATRIX_KEY(0x16, 0x02, KEY_KP6)
|
|
|
|
|
MATRIX_KEY(0x16, 0x03, KEY_KP5)
|
|
|
|
|
MATRIX_KEY(0x16, 0x04, KEY_KP3)
|
|
|
|
|
MATRIX_KEY(0x16, 0x05, KEY_KP2)
|
|
|
|
|
MATRIX_KEY(0x16, 0x07, KEY_KP0)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
|
|
|
|
|
MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
|
|
|
|
|
MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
|
|
|
|
|
MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x1D, 0x03, KEY_HOME)
|
|
|
|
|
MATRIX_KEY(0x1D, 0x04, KEY_END)
|
|
|
|
|
MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
|
|
|
|
|
MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
|
|
|
|
|
MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
|
|
|
|
|
MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
|
|
|
|
|
MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
|
|
|
|
|
|
|
|
|
|
MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
|
2013-01-15 14:24:49 +07:00
|
|
|
};
|
2013-11-27 04:43:45 +07:00
|
|
|
|
|
|
|
|
pmc@7000e400 {
|
|
|
|
|
nvidia,invert-interrupt;
|
|
|
|
|
nvidia,suspend-mode = <1>;
|
|
|
|
|
nvidia,cpu-pwr-good-time = <5000>;
|
|
|
|
|
nvidia,cpu-pwr-off-time = <5000>;
|
|
|
|
|
nvidia,core-pwr-good-time = <3845 3845>;
|
|
|
|
|
nvidia,core-pwr-off-time = <3875>;
|
|
|
|
|
nvidia,sys-clock-req-active-high;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
memory-controller@7000f400 {
|
|
|
|
|
emc-table@190000 {
|
|
|
|
|
reg = <190000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <190000>;
|
|
|
|
|
nvidia,emc-registers = <0x0000000c 0x00000026
|
|
|
|
|
0x00000009 0x00000003 0x00000004 0x00000004
|
|
|
|
|
0x00000002 0x0000000c 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000001 0x00000004 0x00000005
|
|
|
|
|
0x00000004 0x00000009 0x0000000d 0x0000059f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000003 0x00000001 0x0000000b 0x000000c8
|
|
|
|
|
0x00000003 0x00000007 0x00000004 0x0000000f
|
|
|
|
|
0x00000002 0x00000000 0x00000000 0x00000002
|
|
|
|
|
0x00000000 0x00000000 0x00000083 0xa06204ae
|
|
|
|
|
0x007dc010 0x00000000 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@380000 {
|
|
|
|
|
reg = <380000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <380000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000017 0x0000004b
|
|
|
|
|
0x00000012 0x00000006 0x00000004 0x00000005
|
|
|
|
|
0x00000003 0x0000000c 0x00000006 0x00000006
|
|
|
|
|
0x00000003 0x00000001 0x00000004 0x00000005
|
|
|
|
|
0x00000004 0x00000009 0x0000000d 0x00000b5f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000006
|
|
|
|
|
0x00000006 0x00000001 0x00000011 0x000000c8
|
|
|
|
|
0x00000003 0x0000000e 0x00000007 0x0000000f
|
|
|
|
|
0x00000002 0x00000000 0x00000000 0x00000002
|
|
|
|
|
0x00000000 0x00000000 0x00000083 0xe044048b
|
|
|
|
|
0x007d8010 0x00000000 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb@c5000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
dr_mode = "otg";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb-phy@c5000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
vbus-supply = <&vbus_reg>;
|
|
|
|
|
dr_mode = "otg";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb@c5004000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
|
|
|
|
|
GPIO_ACTIVE_LOW>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb-phy@c5004000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
|
|
|
|
|
GPIO_ACTIVE_LOW>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb@c5008000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb-phy@c5008000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdhci@c8000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
keep-power-in-suspend;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdhci@c8000400 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
|
|
|
|
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdhci@c8000600 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
bus-width = <8>;
|
|
|
|
|
non-removable;
|
|
|
|
|
};
|
|
|
|
|
|
2014-01-08 06:16:32 +07:00
|
|
|
backlight: backlight {
|
|
|
|
|
compatible = "pwm-backlight";
|
|
|
|
|
|
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
power-supply = <&vdd_bl_reg>;
|
|
|
|
|
pwms = <&pwm 2 5000000>;
|
|
|
|
|
|
|
|
|
|
brightness-levels = <0 4 8 16 32 64 128 255>;
|
|
|
|
|
default-brightness-level = <6>;
|
|
|
|
|
};
|
|
|
|
|
|
2013-11-27 04:43:45 +07:00
|
|
|
clocks {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
clk32k_in: clock@0 {
|
|
|
|
|
compatible = "fixed-clock";
|
2016-06-10 23:55:24 +07:00
|
|
|
reg = <0>;
|
2013-11-27 04:43:45 +07:00
|
|
|
#clock-cells = <0>;
|
|
|
|
|
clock-frequency = <32768>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpio-keys {
|
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
|
|
|
|
power {
|
|
|
|
|
label = "Power";
|
|
|
|
|
gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
|
2013-12-02 20:09:57 +07:00
|
|
|
linux,code = <KEY_POWER>;
|
2016-02-09 04:55:43 +07:00
|
|
|
wakeup-source;
|
2013-11-27 04:43:45 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
lid {
|
|
|
|
|
label = "Lid";
|
|
|
|
|
gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
linux,input-type = <5>; /* EV_SW */
|
|
|
|
|
linux,code = <0>; /* SW_LID */
|
|
|
|
|
debounce-interval = <1>;
|
2016-02-09 04:55:43 +07:00
|
|
|
wakeup-source;
|
2013-11-27 04:43:45 +07:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2014-01-08 06:16:32 +07:00
|
|
|
panel: panel {
|
|
|
|
|
compatible = "chunghwa,claa101wa01a", "simple-panel";
|
|
|
|
|
|
|
|
|
|
power-supply = <&vdd_pnl_reg>;
|
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
|
|
|
|
|
backlight = <&backlight>;
|
|
|
|
|
ddc-i2c-bus = <&lvds_ddc>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-06-21 04:58:34 +07:00
|
|
|
regulators {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
vdd_5v0_reg: regulator@0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <0>;
|
|
|
|
|
regulator-name = "vdd_5v0";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@1 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
regulator-name = "vdd_1v5";
|
|
|
|
|
regulator-min-microvolt = <1500000>;
|
|
|
|
|
regulator-max-microvolt = <1500000>;
|
2013-02-13 07:25:15 +07:00
|
|
|
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
|
2012-06-21 04:58:34 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@2 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <2>;
|
|
|
|
|
regulator-name = "vdd_1v2";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
2013-02-13 07:25:15 +07:00
|
|
|
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
|
2012-06-21 04:58:34 +07:00
|
|
|
enable-active-high;
|
|
|
|
|
};
|
2013-05-16 21:12:57 +07:00
|
|
|
|
|
|
|
|
vbus_reg: regulator@3 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <3>;
|
|
|
|
|
regulator-name = "vdd_vbus_wup1";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
2013-07-02 04:07:05 +07:00
|
|
|
enable-active-high;
|
2013-08-02 01:26:01 +07:00
|
|
|
gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
|
ARM: tegra: always enable USB VBUS regulators
This fixes a regression exposed during the merge window by commit
9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT"; namely that
USB VBUS doesn't get turned on, so USB devices are not detected. This
affects the internal USB port on TrimSlice (i.e. the USB->SATA bridge, to
which the SSD is connected) and the external port(s) on Seaboard/
Springbank and Whistler.
The Tegra DT as written in v3.11 allows two paths to enable USB VBUS:
1) Via the legacy DT binding for the USB controller; it can directly
acquire a VBUS GPIO and activate it.
2) Via a regulator for VBUS, which is referenced by the new DT binding
for the USB controller.
Those two methods both use the same GPIO, and hence whichever of the
USB controller and regulator gets probed first ends up owning the GPIO.
In practice, the USB driver only supports path (1) above, since the
patches to support the new USB binding are not present until v3.12:-(
In practice, the regulator ends up being probed first and owning the
GPIO. Since nothing enables the regulator (the USB driver code is not
yet present), the regulator ends up being turned off. This originally
caused no problem, because the polarity in the regulator definition was
incorrect, so attempting to turn off the regulator actually turned it
on, and everything worked:-(
However, when testing the new USB driver code in v3.12, I noticed the
incorrect polarity and fixed it in commit 9f310de "ARM: tegra: fix VBUS
regulator GPIO polarity in DT". In the context of v3.11, this patch then
caused the USB VBUS to actually turn off, which broke USB ports with VBUS
control. I got this patch included in v3.11-rc1 since it fixed a bug in
device tree (incorrect polarity specification), and hence was suitable to
be included early in the rc series. I evidently did not test the patch at
all, or correctly, in the context of v3.11, and hence did not notice the
issue that I have explained above:-(
Fix this by making the USB VBUS regulators always enabled. This way, if
the regulator owns the GPIO, it will always be turned on, even if there
is no USB driver code to request the regulator be turned on. Even
ignoring this bug, this is a reasonable way to configure the HW anyway.
If this patch is applied to v3.11, it will cause a couple pretty trivial
conflicts in tegra20-{trimslice,seaboard}.dts when creating v3.12, since
the context right above the added lines changed in patches destined for
v3.12.
Reported-by: Kyle McMartin <kmcmarti@redhat.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-21 03:00:13 +07:00
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
2013-05-16 21:12:57 +07:00
|
|
|
};
|
2014-01-08 06:16:32 +07:00
|
|
|
|
|
|
|
|
vdd_pnl_reg: regulator@4 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <4>;
|
|
|
|
|
regulator-name = "vdd_pnl";
|
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
|
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_bl_reg: regulator@5 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <5>;
|
|
|
|
|
regulator-name = "vdd_bl";
|
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
|
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
2015-04-24 16:57:06 +07:00
|
|
|
|
|
|
|
|
vdd_hdmi: regulator@6 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <6>;
|
|
|
|
|
regulator-name = "VDDIO_HDMI";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
vin-supply = <&vdd_5v0_reg>;
|
|
|
|
|
};
|
2012-06-21 04:58:34 +07:00
|
|
|
};
|
|
|
|
|
|
2012-05-12 06:03:26 +07:00
|
|
|
sound {
|
|
|
|
|
compatible = "nvidia,tegra-audio-wm8903-seaboard",
|
|
|
|
|
"nvidia,tegra-audio-wm8903";
|
|
|
|
|
nvidia,model = "NVIDIA Tegra Seaboard";
|
2011-10-19 01:06:06 +07:00
|
|
|
|
2012-05-12 06:03:26 +07:00
|
|
|
nvidia,audio-routing =
|
|
|
|
|
"Headphone Jack", "HPOUTR",
|
|
|
|
|
"Headphone Jack", "HPOUTL",
|
|
|
|
|
"Int Spk", "ROP",
|
|
|
|
|
"Int Spk", "RON",
|
|
|
|
|
"Int Spk", "LOP",
|
|
|
|
|
"Int Spk", "LON",
|
|
|
|
|
"Mic Jack", "MICBIAS",
|
|
|
|
|
"IN1R", "Mic Jack";
|
2012-04-13 04:46:49 +07:00
|
|
|
|
2012-05-12 06:03:26 +07:00
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
|
|
|
nvidia,audio-codec = <&wm8903>;
|
|
|
|
|
|
2013-02-13 07:25:15 +07:00
|
|
|
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
|
2013-03-27 05:45:52 +07:00
|
|
|
|
2013-05-22 23:45:32 +07:00
|
|
|
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
|
|
|
|
|
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
|
|
|
|
|
<&tegra_car TEGRA20_CLK_CDEV1>;
|
2013-03-27 05:45:52 +07:00
|
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
2012-04-13 04:46:49 +07:00
|
|
|
};
|
2011-07-20 06:26:54 +07:00
|
|
|
};
|