linux_dsm_epyc7002/drivers/gpu/drm/i915/gt
Michel Thierry ff690b2111 drm/i915/tgl: Implement Wa_1604555607
Implement Wa_1604555607 (set the DS pairing timer to 128 cycles).
FF_MODE2 is part of the register state context, that's why it is
implemented here.

At TGL A0 stepping, FF_MODE2 register read back is broken, hence
disabling the WA verification.

v2: Rebased on top of the WA refactoring (Oscar)
v3: Correctly add to ctx_workarounds_init (Michel)
v4:
  uncore read is used [Tvrtko]
  Macros as used for MASK definition [Chris]
v5:
  Skip the Wa_1604555607 verification [Ram]
  i915 ptr retrieved from engine. [Tvrtko]
v6:
  Added wa_add as a wrapper for __wa_add [Chris]
  wa_add is directly called instead of new wrapper [tvrtko]

BSpec: 19363
HSDES: 1604555607
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Ramalingam C <ramlingam.c@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> [v5]
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191128021005.3350-1-ramalingam.c@intel.com
2019-11-29 11:48:20 +00:00
..
selftests drm/i915: Serialise i915_active_fence_set() with itself 2019-11-27 17:02:14 +00:00
uc drm/i915: Mark intel_wakeref_get() as a sleeper 2019-11-21 13:22:04 +00:00
gen6_renderstate.c
gen7_renderstate.c
gen8_renderstate.c
gen9_renderstate.c
intel_breadcrumbs.c
intel_context_types.h drm/i915: Remove logical HW ID 2019-10-04 15:39:30 +01:00
intel_context.c drm/i915: Serialise i915_active_fence_set() with itself 2019-11-27 17:02:14 +00:00
intel_context.h drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_engine_cs.c drm/i915/selftests: Try to show where the pulse went 2019-11-28 11:39:50 +00:00
intel_engine_heartbeat.c drm/i915: Serialise with engine-pm around requests on the kernel_context 2019-11-25 13:17:18 +00:00
intel_engine_heartbeat.h drm/i915/gt: Replace hangcheck by heartbeats 2019-10-23 23:52:10 +01:00
intel_engine_pm.c drm/i915: Serialise i915_active_fence_set() with itself 2019-11-27 17:02:14 +00:00
intel_engine_pm.h drm/i915: Serialise with engine-pm around requests on the kernel_context 2019-11-25 13:17:18 +00:00
intel_engine_pool_types.h
intel_engine_pool.c drm/i915: make pool objects read-only 2019-11-19 16:46:58 +00:00
intel_engine_pool.h
intel_engine_types.h drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 13:17:18 +00:00
intel_engine_user.c drm/i915: Make for_each_engine_masked work on intel_gt 2019-10-18 00:06:25 +01:00
intel_engine_user.h
intel_engine.h drm/i915/gt: Mark the execlists->active as the primary volatile access 2019-11-25 09:45:37 +00:00
intel_gpu_commands.h drm/i915/tgl: Add HDC Pipeline Flush 2019-10-15 18:15:59 +01:00
intel_gt_irq.c drm/i915/gt: Defer breadcrumb processing to after the irq handler 2019-11-27 17:02:14 +00:00
intel_gt_irq.h
intel_gt_pm_irq.c
intel_gt_pm_irq.h
intel_gt_pm.c drm/i915/gt: Manual rc6 entry upon parking 2019-11-27 12:53:27 +00:00
intel_gt_pm.h drm/i915: Mark intel_wakeref_get() as a sleeper 2019-11-21 13:22:04 +00:00
intel_gt_requests.c drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 13:17:18 +00:00
intel_gt_requests.h drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 13:17:18 +00:00
intel_gt_types.h drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
intel_gt.c drm/i915/gt: Only wait for register chipset flush if active 2019-11-19 10:11:29 +00:00
intel_gt.h drm/i915/gt: Call intel_gt_sanitize() directly 2019-11-05 16:04:16 +02:00
intel_llc_types.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
intel_llc.c drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
intel_llc.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
intel_lrc_reg.h drm/i915/execlists: Verify context register state before execution 2019-11-02 13:39:13 +00:00
intel_lrc.c drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 13:17:18 +00:00
intel_lrc.h drm/i915: drop lrc header page 2019-10-31 16:47:22 +00:00
intel_mocs.c drm/i915/selftests: Add coverage of mocs registers 2019-11-14 17:38:54 +00:00
intel_mocs.h drm/i915: Do initial mocs configuration directly 2019-10-16 19:35:37 +01:00
intel_rc6_types.h drm/i915/gt: Manual rc6 entry upon parking 2019-11-27 12:53:27 +00:00
intel_rc6.c drm/i915/gt: Manual rc6 entry upon parking 2019-11-27 12:53:27 +00:00
intel_rc6.h drm/i915/gt: Manual rc6 entry upon parking 2019-11-27 12:53:27 +00:00
intel_renderstate.c drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_renderstate.h
intel_reset_types.h
intel_reset.c drm/i915/gt: Declare timeline.lock to be irq-free 2019-11-20 17:12:11 +00:00
intel_reset.h drm/i915: Don't mix srcu tag and negative error codes 2019-10-07 10:44:48 -07:00
intel_ring_submission.c drm/i915/gt: Invalidate as we write the gen7 breadcrumb 2019-11-13 16:42:10 +00:00
intel_ring_types.h drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_ring.c drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint 2019-11-19 15:12:46 +00:00
intel_ring.h drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_rps_types.h drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
intel_rps.c drm/i915/guc: Properly capture & release GuC interrupts on Gen11+ 2019-11-14 23:04:36 +00:00
intel_rps.h drm/i915/gt: Always track callers to intel_rps_mark_interactive() 2019-10-30 13:23:00 +00:00
intel_sseu.c
intel_sseu.h
intel_timeline_types.h drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 13:17:18 +00:00
intel_timeline.c drm/i915: Serialise i915_active_fence_set() with itself 2019-11-27 17:02:14 +00:00
intel_timeline.h drm/i915/gt: Pull timeline initialise to intel_gt_init_early 2019-11-01 14:47:36 +00:00
intel_workarounds_types.h
intel_workarounds.c drm/i915/tgl: Implement Wa_1604555607 2019-11-29 11:48:20 +00:00
intel_workarounds.h
Makefile
mock_engine.c drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
mock_engine.h
selftest_context.c drm/i915: Serialise with engine-pm around requests on the kernel_context 2019-11-25 13:17:18 +00:00
selftest_engine_cs.c drm/i915: Serialise with engine-pm around requests on the kernel_context 2019-11-25 13:17:18 +00:00
selftest_engine_heartbeat.c drm/i915/selftests: Try to show where the pulse went 2019-11-28 11:39:50 +00:00
selftest_engine_pm.c drm/i915: Mark up the calling context for intel_wakeref_put() 2019-11-20 15:59:23 +00:00
selftest_engine.c
selftest_engine.h
selftest_gt_pm.c drm/i915/gt: Manual rc6 entry upon parking 2019-11-27 12:53:27 +00:00
selftest_hangcheck.c drm/i915/selftests: Complete transition to a real struct file mock 2019-11-08 10:17:41 +00:00
selftest_llc.c drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
selftest_llc.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
selftest_lrc.c drm/i915: Serialise with engine-pm around requests on the kernel_context 2019-11-25 13:17:18 +00:00
selftest_mocs.c drm/i915: Serialise with engine-pm around requests on the kernel_context 2019-11-25 13:17:18 +00:00
selftest_rc6.c drm/i915/gt: Manual rc6 entry upon parking 2019-11-27 12:53:27 +00:00
selftest_rc6.h drm/i915/gt: Manual rc6 entry upon parking 2019-11-27 12:53:27 +00:00
selftest_reset.c drm/i915/selftests: Flush interrupts before disabling tasklets 2019-10-24 09:18:52 +01:00
selftest_timeline.c drm/i915: Serialise with engine-pm around requests on the kernel_context 2019-11-25 13:17:18 +00:00
selftest_workarounds.c drm/i915/selftests: Complete transition to a real struct file mock 2019-11-08 10:17:41 +00:00