Mark Zhang b270491eb9 clk: tegra: Define PLLD_DSI and remove dsia(b)_mux ... PLLD is the only parent for DSIA & DSIB on Tegra124 and Tegra132. Besides, BIT 30 in PLLD_MISC register controls the output of DSI clock. So this patch removes "dsia_mux" & "dsib_mux", and create a new clock "plld_dsi" to represent the DSI clock enable control. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Mark Zhang <markz@nvidia.com>		2015-02-02 16:22:34 +02:00
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clk-audio-sync.c
clk-divider.c	clk: tegra: Implement memory-controller clock	2014-11-26 09:43:23 +01:00
clk-id.h	clk: tegra: Define PLLD_DSI and remove dsia(b)_mux	2015-02-02 16:22:34 +02:00
clk-periph-gate.c	ARM: tegra: Move includes to include/soc/tegra	2014-07-17 13:26:47 +02:00
clk-periph.c	clk: tegra: Staticize tegra_clk_periph_no_gate_ops	2014-02-23 14:46:05 -08:00
clk-pll-out.c
clk-pll.c	clk: tegra: Add support for the Tegra132 CAR IP block	2015-02-02 15:47:53 +02:00
clk-super.c
clk-tegra20.c	clk: tegra: Implement memory-controller clock	2014-11-26 09:43:23 +01:00
clk-tegra30.c	clk: tegra: Implement memory-controller clock	2014-11-26 09:43:23 +01:00
clk-tegra114.c	clk: tegra: Define PLLD_DSI and remove dsia(b)_mux	2015-02-02 16:22:34 +02:00
clk-tegra124.c	clk: tegra: Define PLLD_DSI and remove dsia(b)_mux	2015-02-02 16:22:34 +02:00
clk-tegra-audio.c
clk-tegra-fixed.c
clk-tegra-periph.c	clk: tegra: Define PLLD_DSI and remove dsia(b)_mux	2015-02-02 16:22:34 +02:00
clk-tegra-pmc.c
clk-tegra-super-gen4.c
clk.c	clk: tegra: make tegra_clocks_apply_init_table() arch_initcall	2015-02-02 15:47:28 +02:00
clk.h	clk: tegra: Implement memory-controller clock	2014-11-26 09:43:23 +01:00
Makefile	clk: tegra: Add support for the Tegra132 CAR IP block	2015-02-02 15:47:53 +02:00