Michael Turquette f85c6edfae Tegra clock fixes for 3.20 ... -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUz5H9AAoJEFFb18rurjwTwssP/1luchJTB3qo+tqAIYYADgA4 9QLQqfgIqZuJzzCNYgauELwN5M8S02ZABRzY9OOHnUY6BvoHPMpcOEey7i33ZYTJ 9l4TFBOQyZE6W8tcyVL47pc9cjZydz9KKMO+/T5M16YyYoNZ1rXeGUli5j5sl2j7 KoNurjC6C9Hw0M8+6CBTk4tYcMtxXeIacSGhV4VM03qKWj3e7485z0tYTG9yKfVD ol3KKGwjg1eZ9FSavMVYYnWajXZ7zlbB1PFqWO6V9h7DKmJMINbXGf/qr+/8eYSq zefWEYs1uGKunFtDv3C8wGRnl8ronBHehS2/xPpVEni0Eu2kJo1v8wDmftZ5ZyFW 86ZdS4JTWD1/A2buEbJ3Ct30reNasGFUGNxIrYROglY4dK6DEPCMEFx5ZNiOhxlJ +BMjcsDzTt1gUWHbpxHrIZFErtHKcxtHeVckcZJgh87bnHVQKTAJ3cL9OJSWatqO lBDIsFxSOLap4gMKcMNddOEI8JNL1VZh+I/GdTh6VE2rhcurMNHvxmWL1TJ94/w8 tRHRU5kRdYmxPzL98nDSR0h8WXShdWmnYNr+m2fk8iiPsI4umh/RS014kPVUYKq9 a16cHkq88x3mKlEcyARG9tJK9oOCC5MuNuMPsPKf1dETOgHbAixlJVK5FHzHLjNr fERakm8nBM3rMSlgBbUL =k023 -----END PGP SIGNATURE----- Merge tag 'tegra-clk-3.20' of git://nv-tegra.nvidia.com/user/pdeschrijver/linux into clk-next Tegra clock fixes for 3.20		2015-02-02 15:01:10 -08:00
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at91	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
bcm	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
berlin	clk: berlin: bg2q: remove non-exist "smemc" gate clock	2015-01-13 10:58:43 -08:00
hisilicon	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
keystone
mmp	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
mvebu
mxs
pxa	clk: pxa: add pxa3xx clock driver	2015-01-27 17:03:52 -08:00
qcom	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
rockchip	The two big changes are the additional of the watchdog clock, which	2015-01-27 16:26:12 -08:00
samsung	Exynos 3250, 4415 drivers cleanup by using common code	2015-02-02 14:51:16 -08:00
shmobile	clk: shmobile: Add R-Car Gen2 ADSP clock support	2015-01-08 16:14:31 +01:00
sirf
socfpga
spear
st	clk: st: STiH410: Fix pdiv and fdiv divisor when setting rate	2015-01-20 10:09:13 -08:00
sunxi	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
tegra	clk: tegra: Define PLLD_DSI and remove dsia(b)_mux	2015-02-02 16:22:34 +02:00
ti	Merge branch 'clk-omap-legacy' into clk-next	2015-02-02 14:23:33 -08:00
ux500	clk: ux500: Drop use of clk-private.h	2015-01-27 11:56:33 -08:00
versatile
x86
zynq	clk: zynq: Force CPU_2X clock to be ungated	2015-01-27 17:00:24 -08:00
clk-asm9260.c	ARM: clk: add clk-asm9260 driver	2015-01-20 10:10:51 -08:00
clk-axi-clkgen.c
clk-axm5516.c
clk-bcm2835.c
clk-cdce706.c	clk: TI CDCE706 clock synthesizer driver	2015-01-17 13:52:40 -08:00
clk-clps711x.c
clk-composite.c	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
clk-conf.c
clk-devres.c
clk-divider.c	clk: divider: Make generic for usage elsewhere	2015-01-27 11:48:52 -08:00
clk-efm32gg.c
clk-fixed-factor.c
clk-fixed-rate.c
clk-fractional-divider.c
clk-gate.c	clk-gate: fix bit # check in clk_register_gate()	2015-01-20 10:09:05 -08:00
clk-gpio-gate.c
clk-highbank.c
clk-ls1x.c
clk-max77686.c
clk-max77802.c
clk-max-gen.c
clk-max-gen.h
clk-moxart.c
clk-mux.c	clk: Add clk_unregister_{divider, gate, mux} to close memory leak	2015-01-17 13:52:41 -08:00
clk-nomadik.c
clk-nspire.c
clk-palmas.c
clk-qoriq.c	clk: qoriq: Use pr_fmt()	2015-01-28 10:11:40 -08:00
clk-rk808.c
clk-s2mps11.c	Please consider pulling the clk framework changes toward 3.19. It is	2014-12-20 16:42:36 -08:00
clk-si570.c
clk-si5351.c
clk-si5351.h
clk-twl6040.c
clk-u300.c
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
clk.h	clk: Make clk API return per-user struct clk instances	2015-02-02 14:22:19 -08:00
clkdev.c	clkdev: Export clk_register_clkdev	2015-02-02 14:23:43 -08:00
Kconfig	clk: ppc-corenet: rename driver to clk-qoriq	2015-01-20 10:09:12 -08:00
Makefile	ARM: clk: add clk-asm9260 driver	2015-01-20 10:10:51 -08:00