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f26a9e959a
linux_dsm_epyc7002/drivers/gpu/drm/i915/gt
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Chris Wilson f26a9e959a drm/i915/gt: Detect if we miss WaIdleLiteRestore 
In order to avoid confusing the HW, we must never submit an empty ring
during lite-restore, that is we should always advance the RING_TAIL
before submitting to stay ahead of the RING_HEAD.

Normally this is prevented by keeping a couple of spare NOPs in the
request->wa_tail so that on resubmission we can advance the tail. This
relies on the request only being resubmitted once, which is the normal
condition as it is seen once for ELSP[1] and then later in ELSP[0]. On
preemption, the requests are unwound and the tail reset back to the
normal end point (as we know the request is incomplete and therefore its
RING_HEAD is even earlier).

However, if this w/a should fail we would try and resubmit the request
with the RING_TAIL already set to the location of this request's wa_tail
potentially causing a GPU hang. We can spot when we do try and
incorrectly resubmit without advancing the RING_TAIL and spare any
embarrassment by forcing the context restore.

In the case of preempt-to-busy, we leave the requests running on the HW
while we unwind. As the ring is still live, we cannot rewind our
rq->tail without forcing a reload so leave it set to rq->wa_tail and
only force a reload if we resubmit after a lite-restore. (Normally, the
forced reload will be a part of the preemption event.)

Fixes: 22b7a426bb ("drm/i915/execlists: Preempt-to-busy")
Closes: https://gitlab.freedesktop.org/drm/intel/issues/673
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: stable@kernel.vger.org
Link: https://patchwork.freedesktop.org/patch/msgid/20191209023215.3519970-1-chris@chris-wilson.co.uk
(cherry picked from commit 82c69bf586)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2019-12-10 12:37:53 +02:00
..
selftests drm/i915: Coordinate i915_active with its own mutex 2019-10-04 15:39:12 +01:00
uc drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission 2019-11-18 16:36:44 +02:00
gen6_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen7_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen8_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen9_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_breadcrumbs.c drm/i915: Don't disable interrupts for intel_engine_breadcrumbs_irq() 2019-09-26 18:44:35 +01:00
intel_context_types.h drm/i915: Remove logical HW ID 2019-10-04 15:39:30 +01:00
intel_context.c drm/i915: Reduce nested prepare_remote_context() to a trylock 2019-11-27 10:12:19 +02:00
intel_context.h drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_engine_cs.c drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 16:39:07 +02:00
intel_engine_heartbeat.c drm/i915/gt: Only drop heartbeat.systole if the sole owner 2019-11-11 10:29:47 +02:00
intel_engine_heartbeat.h drm/i915/gt: Replace hangcheck by heartbeats 2019-10-23 23:52:10 +01:00
intel_engine_pm.c drm msm + fixes for 5.5-rc1 2019-12-06 10:28:09 -08:00
intel_engine_pm.h drm/i915: Mark up the calling context for intel_wakeref_put() 2019-11-25 15:29:17 +02:00
intel_engine_pool_types.h drm/i915: Replace struct_mutex for batch pool serialisation 2019-08-04 14:31:18 +01:00
intel_engine_pool.c drm main pull for 5.5-rc1 2019-11-27 17:45:48 -08:00
intel_engine_pool.h drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_engine_types.h drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 16:39:07 +02:00
intel_engine_user.c drm/i915: Make for_each_engine_masked work on intel_gt 2019-10-18 00:06:25 +01:00
intel_engine_user.h drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
intel_engine.h drm/i915/gt: Mark the execlists->active as the primary volatile access 2019-11-25 16:36:40 +02:00
intel_gpu_commands.h drm/i915/tgl: Add HDC Pipeline Flush 2019-10-15 18:15:59 +01:00
intel_gt_irq.c drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
intel_gt_irq.h drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.h drm/i915: Extract GT powermanagement interrupt handling 2019-08-12 15:36:06 +01:00
intel_gt_pm.c drm/i915: Mark up the calling context for intel_wakeref_put() 2019-11-25 15:29:17 +02:00
intel_gt_pm.h drm/i915: Mark up the calling context for intel_wakeref_put() 2019-11-25 15:29:17 +02:00
intel_gt_requests.c drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 16:39:07 +02:00
intel_gt_requests.h drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 16:39:07 +02:00
intel_gt_types.h drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
intel_gt.c drm/i915/gt: Call intel_gt_sanitize() directly 2019-11-05 16:04:16 +02:00
intel_gt.h drm/i915/gt: Call intel_gt_sanitize() directly 2019-11-05 16:04:16 +02:00
intel_llc_types.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
intel_llc.c drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
intel_llc.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
intel_lrc_reg.h drm/i915/selftests: Verify the LRC register layout between init and HW 2019-09-24 17:27:19 +01:00
intel_lrc.c drm/i915/gt: Detect if we miss WaIdleLiteRestore 2019-12-10 12:37:53 +02:00
intel_lrc.h drm/i915: drop lrc header page 2019-10-31 16:47:22 +00:00
intel_mocs.c drm main pull for 5.5-rc1 2019-11-27 17:45:48 -08:00
intel_mocs.h drm/i915: Do initial mocs configuration directly 2019-10-16 19:35:37 +01:00
intel_rc6_types.h drm/i915/gen8+: Add RC6 CTX corruption WA 2019-11-14 10:51:54 +10:00
intel_rc6.c drm/i915: Restore GT coarse power gating workaround 2019-11-18 16:36:34 +02:00
intel_rc6.h drm/i915/gen8+: Add RC6 CTX corruption WA 2019-11-14 10:51:54 +10:00
intel_renderstate.c drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_renderstate.h drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_reset_types.h drm/i915: Define explicit wedged on init reset state 2019-09-26 18:44:35 +01:00
intel_reset.c drm/i915: Mark up the calling context for intel_wakeref_put() 2019-11-25 15:29:17 +02:00
intel_reset.h drm/i915: Don't mix srcu tag and negative error codes 2019-10-07 10:44:48 -07:00
intel_ring_submission.c drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_ring_types.h drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_ring.c drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint 2019-11-26 09:50:25 +02:00
intel_ring.h drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
intel_rps_types.h drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
intel_rps.c drm/i915/gt: Always track callers to intel_rps_mark_interactive() 2019-10-30 13:23:00 +00:00
intel_rps.h drm/i915/gt: Always track callers to intel_rps_mark_interactive() 2019-10-30 13:23:00 +00:00
intel_sseu.c drm/i915: Expand subslice mask 2019-08-23 19:14:27 +01:00
intel_sseu.h drm/i915/tgl: s/ss/eu fuse reading support 2019-09-21 08:31:08 +01:00
intel_timeline_types.h drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 16:39:07 +02:00
intel_timeline.c drm/i915/gt: Schedule request retirement when timeline idles 2019-11-25 16:39:07 +02:00
intel_timeline.h drm/i915/gt: Track timeline activeness in enter/exit 2019-08-15 23:16:05 +01:00
intel_workarounds_types.h drm/i915: Add engine name to workaround debug print 2019-07-12 09:55:30 +01:00
intel_workarounds.c drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT 2019-10-24 23:34:38 +01:00
intel_workarounds.h drm/i915: Convert gt workarounds to intel_gt 2019-06-21 13:48:25 +01:00
Makefile drm/i915: use upstream version of header tests 2019-07-30 12:11:57 +03:00
mock_engine.c drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
mock_engine.h
selftest_context.c drm/i915: drop lrc header page 2019-10-31 16:47:22 +00:00
selftest_engine_cs.c drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
selftest_engine_heartbeat.c drm/i915/selftests: Pretty print the i915_active 2019-10-31 14:43:14 +00:00
selftest_engine_pm.c drm/i915: Mark up the calling context for intel_wakeref_put() 2019-11-25 15:29:17 +02:00
selftest_engine.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_engine.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_gt_pm.c drm/i915/selftests: Add intel_gt_suspend_prepare 2019-11-05 16:06:25 +02:00
selftest_hangcheck.c drm/i915/selftests: Start kthreads before stopping 2019-11-01 10:12:29 +00:00
selftest_llc.c drm/i915: Extract GT render power state management 2019-10-26 19:28:59 +01:00
selftest_llc.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
selftest_lrc.c drm/i915/selftests: Start kthreads before stopping 2019-11-01 10:12:29 +00:00
selftest_reset.c drm/i915/selftests: Flush interrupts before disabling tasklets 2019-10-24 09:18:52 +01:00
selftest_timeline.c drm/i915/gt: Split intel_ring_submission 2019-10-24 12:14:21 +01:00
selftest_workarounds.c drm/i915: Remove nonpriv flags when srm/lrm 2019-10-24 23:34:38 +01:00