Sergei Shtylyov 758e285fac [MIPS] Alchemy: work around clock misdetection on early Au1000 ... Work around the CPU clock miscalculation on Au1000DA/HA/HB due the sys_cpupll register being write-only, i.e. actually do what the comment before cal_r4off() function advertised for years but the code failed at. This is achieved by just giving user a chance to define the clock explicitly in the board config. via CONFIG_SOC_AU1000_FREQUENCY option, defaulting to 396 MHz if the option is not given... The patch is based on the AMD's big unpublished patch, the issue seems to be an undocumented errata (or feature :-)... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2008-04-01 15:46:34 +01:00
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au1xxx_dbdma.h	[MIPS] checkfiles: Fix "need space after that ','" errors.	2007-10-11 23:46:15 +01:00
au1xxx_ide.h	au1xxx-ide: use hwif->dev	2008-02-01 23:09:31 +01:00
au1xxx_psc.h
au1xxx.h
au1000_dma.h	IRQ: Use the new typedef for interrupt handler function pointers	2006-10-09 12:19:47 +01:00
au1000_gpio.h
au1000.h	[MIPS] Alchemy: work around clock misdetection on early Au1000	2008-04-01 15:46:34 +01:00
au1100_mmc.h	[MIPS] Alchemy: Fix Au1x SD controller IRQ	2007-12-09 04:51:10 +00:00
au1550_spi.h	au1550 SPI controller driver	2007-05-08 11:15:16 -07:00
gpio.h	[MIPS] Add generic GPIO to Au1x00	2007-07-10 17:32:56 +01:00
ioremap.h	[MIPS] Make ioremap() work on TX39/49 special unmapped segment	2007-07-10 17:33:03 +01:00
prom.h	add new prom.h for AU1x00	2007-10-15 14:38:25 -04:00
war.h	[MIPS] Split up war.h	2007-10-11 23:46:07 +01:00