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[MIPS] Make ioremap() work on TX39/49 special unmapped segment
TX39XX and TX49XX have "reserved" segment in CKSEG3 area. 0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX are reserved (unmapped, uncached). Controllers on these SoCs are placed in this segment. This patch add plat_ioremap() and plat_iounmap() to override default behavior and implement these hooks for TX39/TX49. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -580,6 +580,7 @@ load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
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#
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core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
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core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
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cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
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load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
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#
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@ -587,6 +588,7 @@ load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
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#
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core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
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core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
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cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
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load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
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cflags-y += -Iinclude/asm-mips/mach-generic
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@ -178,6 +178,11 @@ extern void __iounmap(const volatile void __iomem *addr);
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static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
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unsigned long flags)
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{
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void __iomem *addr = plat_ioremap(offset, size, flags);
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if (addr)
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return addr;
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#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
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if (cpu_has_64bit_addresses) {
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@ -282,6 +287,9 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
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static inline void iounmap(const volatile void __iomem *addr)
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{
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if (plat_iounmap(addr))
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return;
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#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
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if (cpu_has_64bit_addresses ||
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@ -28,4 +28,15 @@ static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
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return __fixup_bigphys_addr(phys_addr, size);
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}
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static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
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unsigned long flags)
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{
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return NULL;
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}
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static inline int plat_iounmap(const volatile void __iomem *addr)
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{
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return 0;
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}
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#endif /* __ASM_MACH_AU1X00_IOREMAP_H */
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@ -20,4 +20,15 @@ static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
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return phys_addr;
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}
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static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
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unsigned long flags)
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{
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return NULL;
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}
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static inline int plat_iounmap(const volatile void __iomem *addr)
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{
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return 0;
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}
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#endif /* __ASM_MACH_GENERIC_IOREMAP_H */
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38
include/asm-mips/mach-jmr3927/ioremap.h
Normal file
38
include/asm-mips/mach-jmr3927/ioremap.h
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@ -0,0 +1,38 @@
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/*
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* include/asm-mips/mach-jmr3927/ioremap.h
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef __ASM_MACH_JMR3927_IOREMAP_H
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#define __ASM_MACH_JMR3927_IOREMAP_H
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#include <linux/types.h>
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/*
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* Allow physical addresses to be fixed up to help peripherals located
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* outside the low 32-bit range -- generic pass-through version.
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*/
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static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
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{
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return phys_addr;
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}
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static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
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unsigned long flags)
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{
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#define TXX9_DIRECTMAP_BASE 0xff000000ul
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if (offset >= TXX9_DIRECTMAP_BASE &&
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offset < TXX9_DIRECTMAP_BASE + 0xf0000)
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return (void __iomem *)offset;
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return NULL;
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}
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static inline int plat_iounmap(const volatile void __iomem *addr)
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{
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return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
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}
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#endif /* __ASM_MACH_JMR3927_IOREMAP_H */
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42
include/asm-mips/mach-tx49xx/ioremap.h
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42
include/asm-mips/mach-tx49xx/ioremap.h
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@ -0,0 +1,42 @@
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/*
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* include/asm-mips/mach-tx49xx/ioremap.h
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef __ASM_MACH_TX49XX_IOREMAP_H
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#define __ASM_MACH_TX49XX_IOREMAP_H
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#include <linux/types.h>
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/*
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* Allow physical addresses to be fixed up to help peripherals located
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* outside the low 32-bit range -- generic pass-through version.
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*/
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static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
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{
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return phys_addr;
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}
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static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
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unsigned long flags)
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{
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#ifdef CONFIG_64BIT
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#define TXX9_DIRECTMAP_BASE 0xfff000000ul
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#else
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#define TXX9_DIRECTMAP_BASE 0xff000000ul
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#endif
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if (offset >= TXX9_DIRECTMAP_BASE &&
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offset < TXX9_DIRECTMAP_BASE + 0x400000)
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return (void __iomem *)(unsigned long)(int)offset;
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return NULL;
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}
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static inline int plat_iounmap(const volatile void __iomem *addr)
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{
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return (unsigned long)addr >= (unsigned long)(int)TXX9_DIRECTMAP_BASE;
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}
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#endif /* __ASM_MACH_TX49XX_IOREMAP_H */
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