Sung Lee e9a135a969 drm/amd/display: Update DCN2.1 DV Code Revision ... [WHY & HOW] There is a problem in hscale_pixel_rate, the bug causes DCN to be more optimistic (more likely to underflow) in upscale cases during prefetch. This commit ports the fix from DV code to address these issues. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-05-05 13:10:52 -04:00
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acp	drm: amd/acp: fix broken menu structure	2020-03-13 11:52:35 -04:00
amdgpu	amd/amdgpu: Limit rlcg write registers only for nv12	2020-05-01 15:19:08 -04:00
amdkfd	drm/amdkfd: Use a systematic method to calculate queue mask bit	2020-05-01 15:19:08 -04:00
display	drm/amd/display: Update DCN2.1 DV Code Revision	2020-05-05 13:10:52 -04:00
include	drm/amd/powerplay: revise the way to retrieve the board parameters	2020-04-22 18:11:45 -04:00
powerplay	drm/amdgpu/smu10: remove duplicate assignment of smu10_hwmgr_funcs members	2020-04-30 16:48:07 -04:00