mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-03-10 02:22:15 +07:00
drm/amd/powerplay: revise the way to retrieve the board parameters
It can support different NV1x ASIC better. And this can guard no member got missing. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
Alex Deucher
parent
ced1ba9761
commit
02c0bb4ee3
@ -1876,6 +1876,108 @@ struct atom_smc_dpm_info_v4_6
|
||||
uint32_t boardreserved[10];
|
||||
};
|
||||
|
||||
struct atom_smc_dpm_info_v4_7
|
||||
{
|
||||
struct atom_common_table_header table_header;
|
||||
// SECTION: BOARD PARAMETERS
|
||||
// I2C Control
|
||||
struct smudpm_i2c_controller_config_v2 I2cControllers[8];
|
||||
|
||||
// SVI2 Board Parameters
|
||||
uint16_t MaxVoltageStepGfx; // In mV(Q2) Max voltage step that SMU will request. Multiple steps are taken if voltage change exceeds this value.
|
||||
uint16_t MaxVoltageStepSoc; // In mV(Q2) Max voltage step that SMU will request. Multiple steps are taken if voltage change exceeds this value.
|
||||
|
||||
uint8_t VddGfxVrMapping; // Use VR_MAPPING* bitfields
|
||||
uint8_t VddSocVrMapping; // Use VR_MAPPING* bitfields
|
||||
uint8_t VddMem0VrMapping; // Use VR_MAPPING* bitfields
|
||||
uint8_t VddMem1VrMapping; // Use VR_MAPPING* bitfields
|
||||
|
||||
uint8_t GfxUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
|
||||
uint8_t SocUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
|
||||
uint8_t ExternalSensorPresent; // External RDI connected to TMON (aka TEMP IN)
|
||||
uint8_t Padding8_V;
|
||||
|
||||
// Telemetry Settings
|
||||
uint16_t GfxMaxCurrent; // in Amps
|
||||
uint8_t GfxOffset; // in Amps
|
||||
uint8_t Padding_TelemetryGfx;
|
||||
uint16_t SocMaxCurrent; // in Amps
|
||||
uint8_t SocOffset; // in Amps
|
||||
uint8_t Padding_TelemetrySoc;
|
||||
|
||||
uint16_t Mem0MaxCurrent; // in Amps
|
||||
uint8_t Mem0Offset; // in Amps
|
||||
uint8_t Padding_TelemetryMem0;
|
||||
|
||||
uint16_t Mem1MaxCurrent; // in Amps
|
||||
uint8_t Mem1Offset; // in Amps
|
||||
uint8_t Padding_TelemetryMem1;
|
||||
|
||||
// GPIO Settings
|
||||
uint8_t AcDcGpio; // GPIO pin configured for AC/DC switching
|
||||
uint8_t AcDcPolarity; // GPIO polarity for AC/DC switching
|
||||
uint8_t VR0HotGpio; // GPIO pin configured for VR0 HOT event
|
||||
uint8_t VR0HotPolarity; // GPIO polarity for VR0 HOT event
|
||||
|
||||
uint8_t VR1HotGpio; // GPIO pin configured for VR1 HOT event
|
||||
uint8_t VR1HotPolarity; // GPIO polarity for VR1 HOT event
|
||||
uint8_t GthrGpio; // GPIO pin configured for GTHR Event
|
||||
uint8_t GthrPolarity; // replace GPIO polarity for GTHR
|
||||
|
||||
// LED Display Settings
|
||||
uint8_t LedPin0; // GPIO number for LedPin[0]
|
||||
uint8_t LedPin1; // GPIO number for LedPin[1]
|
||||
uint8_t LedPin2; // GPIO number for LedPin[2]
|
||||
uint8_t padding8_4;
|
||||
|
||||
// GFXCLK PLL Spread Spectrum
|
||||
uint8_t PllGfxclkSpreadEnabled; // on or off
|
||||
uint8_t PllGfxclkSpreadPercent; // Q4.4
|
||||
uint16_t PllGfxclkSpreadFreq; // kHz
|
||||
|
||||
// GFXCLK DFLL Spread Spectrum
|
||||
uint8_t DfllGfxclkSpreadEnabled; // on or off
|
||||
uint8_t DfllGfxclkSpreadPercent; // Q4.4
|
||||
uint16_t DfllGfxclkSpreadFreq; // kHz
|
||||
|
||||
// UCLK Spread Spectrum
|
||||
uint8_t UclkSpreadEnabled; // on or off
|
||||
uint8_t UclkSpreadPercent; // Q4.4
|
||||
uint16_t UclkSpreadFreq; // kHz
|
||||
|
||||
// SOCCLK Spread Spectrum
|
||||
uint8_t SoclkSpreadEnabled; // on or off
|
||||
uint8_t SocclkSpreadPercent; // Q4.4
|
||||
uint16_t SocclkSpreadFreq; // kHz
|
||||
|
||||
// Total board power
|
||||
uint16_t TotalBoardPower; //Only needed for TCP Estimated case, where TCP = TGP+Total Board Power
|
||||
uint16_t BoardPadding;
|
||||
|
||||
// Mvdd Svi2 Div Ratio Setting
|
||||
uint32_t MvddRatio; // This is used for MVDD Vid workaround. It has 16 fractional bits (Q16.16)
|
||||
|
||||
// GPIO pins for I2C communications with 2nd controller for Input Telemetry Sequence
|
||||
uint8_t GpioI2cScl; // Serial Clock
|
||||
uint8_t GpioI2cSda; // Serial Data
|
||||
uint16_t GpioPadding;
|
||||
|
||||
// Additional LED Display Settings
|
||||
uint8_t LedPin3; // GPIO number for LedPin[3] - PCIE GEN Speed
|
||||
uint8_t LedPin4; // GPIO number for LedPin[4] - PMFW Error Status
|
||||
uint16_t LedEnableMask;
|
||||
|
||||
// Power Limit Scalars
|
||||
uint8_t PowerLimitScalar[4]; //[PPT_THROTTLER_COUNT]
|
||||
|
||||
uint8_t MvddUlvPhaseSheddingMask;
|
||||
uint8_t VddciUlvPhaseSheddingMask;
|
||||
uint8_t Padding8_Psi1;
|
||||
uint8_t Padding8_Psi2;
|
||||
|
||||
uint32_t BoardReserved[5];
|
||||
};
|
||||
|
||||
/*
|
||||
***************************************************************************
|
||||
Data Table asic_profiling_info structure
|
||||
|
||||
@ -423,6 +423,7 @@ static int navi10_append_powerplay_table(struct smu_context *smu)
|
||||
struct smu_table_context *table_context = &smu->smu_table;
|
||||
PPTable_t *smc_pptable = table_context->driver_pptable;
|
||||
struct atom_smc_dpm_info_v4_5 *smc_dpm_table;
|
||||
struct atom_smc_dpm_info_v4_7 *smc_dpm_table_v4_7;
|
||||
int index, ret;
|
||||
|
||||
index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
|
||||
@ -433,77 +434,33 @@ static int navi10_append_powerplay_table(struct smu_context *smu)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
memcpy(smc_pptable->I2cControllers, smc_dpm_table->I2cControllers,
|
||||
sizeof(I2cControllerConfig_t) * NUM_I2C_CONTROLLERS);
|
||||
pr_info("smc_dpm_info table revision(format.content): %d.%d\n",
|
||||
smc_dpm_table->table_header.format_revision,
|
||||
smc_dpm_table->table_header.content_revision);
|
||||
|
||||
/* SVI2 Board Parameters */
|
||||
smc_pptable->MaxVoltageStepGfx = smc_dpm_table->MaxVoltageStepGfx;
|
||||
smc_pptable->MaxVoltageStepSoc = smc_dpm_table->MaxVoltageStepSoc;
|
||||
smc_pptable->VddGfxVrMapping = smc_dpm_table->VddGfxVrMapping;
|
||||
smc_pptable->VddSocVrMapping = smc_dpm_table->VddSocVrMapping;
|
||||
smc_pptable->VddMem0VrMapping = smc_dpm_table->VddMem0VrMapping;
|
||||
smc_pptable->VddMem1VrMapping = smc_dpm_table->VddMem1VrMapping;
|
||||
smc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->GfxUlvPhaseSheddingMask;
|
||||
smc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->SocUlvPhaseSheddingMask;
|
||||
smc_pptable->ExternalSensorPresent = smc_dpm_table->ExternalSensorPresent;
|
||||
smc_pptable->Padding8_V = smc_dpm_table->Padding8_V;
|
||||
if (smc_dpm_table->table_header.format_revision != 4) {
|
||||
pr_err("smc_dpm_info table format revision is not 4!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Telemetry Settings */
|
||||
smc_pptable->GfxMaxCurrent = smc_dpm_table->GfxMaxCurrent;
|
||||
smc_pptable->GfxOffset = smc_dpm_table->GfxOffset;
|
||||
smc_pptable->Padding_TelemetryGfx = smc_dpm_table->Padding_TelemetryGfx;
|
||||
smc_pptable->SocMaxCurrent = smc_dpm_table->SocMaxCurrent;
|
||||
smc_pptable->SocOffset = smc_dpm_table->SocOffset;
|
||||
smc_pptable->Padding_TelemetrySoc = smc_dpm_table->Padding_TelemetrySoc;
|
||||
smc_pptable->Mem0MaxCurrent = smc_dpm_table->Mem0MaxCurrent;
|
||||
smc_pptable->Mem0Offset = smc_dpm_table->Mem0Offset;
|
||||
smc_pptable->Padding_TelemetryMem0 = smc_dpm_table->Padding_TelemetryMem0;
|
||||
smc_pptable->Mem1MaxCurrent = smc_dpm_table->Mem1MaxCurrent;
|
||||
smc_pptable->Mem1Offset = smc_dpm_table->Mem1Offset;
|
||||
smc_pptable->Padding_TelemetryMem1 = smc_dpm_table->Padding_TelemetryMem1;
|
||||
|
||||
/* GPIO Settings */
|
||||
smc_pptable->AcDcGpio = smc_dpm_table->AcDcGpio;
|
||||
smc_pptable->AcDcPolarity = smc_dpm_table->AcDcPolarity;
|
||||
smc_pptable->VR0HotGpio = smc_dpm_table->VR0HotGpio;
|
||||
smc_pptable->VR0HotPolarity = smc_dpm_table->VR0HotPolarity;
|
||||
smc_pptable->VR1HotGpio = smc_dpm_table->VR1HotGpio;
|
||||
smc_pptable->VR1HotPolarity = smc_dpm_table->VR1HotPolarity;
|
||||
smc_pptable->GthrGpio = smc_dpm_table->GthrGpio;
|
||||
smc_pptable->GthrPolarity = smc_dpm_table->GthrPolarity;
|
||||
|
||||
/* LED Display Settings */
|
||||
smc_pptable->LedPin0 = smc_dpm_table->LedPin0;
|
||||
smc_pptable->LedPin1 = smc_dpm_table->LedPin1;
|
||||
smc_pptable->LedPin2 = smc_dpm_table->LedPin2;
|
||||
smc_pptable->padding8_4 = smc_dpm_table->padding8_4;
|
||||
|
||||
/* GFXCLK PLL Spread Spectrum */
|
||||
smc_pptable->PllGfxclkSpreadEnabled = smc_dpm_table->PllGfxclkSpreadEnabled;
|
||||
smc_pptable->PllGfxclkSpreadPercent = smc_dpm_table->PllGfxclkSpreadPercent;
|
||||
smc_pptable->PllGfxclkSpreadFreq = smc_dpm_table->PllGfxclkSpreadFreq;
|
||||
|
||||
/* GFXCLK DFLL Spread Spectrum */
|
||||
smc_pptable->DfllGfxclkSpreadEnabled = smc_dpm_table->DfllGfxclkSpreadEnabled;
|
||||
smc_pptable->DfllGfxclkSpreadPercent = smc_dpm_table->DfllGfxclkSpreadPercent;
|
||||
smc_pptable->DfllGfxclkSpreadFreq = smc_dpm_table->DfllGfxclkSpreadFreq;
|
||||
|
||||
/* UCLK Spread Spectrum */
|
||||
smc_pptable->UclkSpreadEnabled = smc_dpm_table->UclkSpreadEnabled;
|
||||
smc_pptable->UclkSpreadPercent = smc_dpm_table->UclkSpreadPercent;
|
||||
smc_pptable->UclkSpreadFreq = smc_dpm_table->UclkSpreadFreq;
|
||||
|
||||
/* SOCCLK Spread Spectrum */
|
||||
smc_pptable->SoclkSpreadEnabled = smc_dpm_table->SoclkSpreadEnabled;
|
||||
smc_pptable->SocclkSpreadPercent = smc_dpm_table->SocclkSpreadPercent;
|
||||
smc_pptable->SocclkSpreadFreq = smc_dpm_table->SocclkSpreadFreq;
|
||||
|
||||
/* Total board power */
|
||||
smc_pptable->TotalBoardPower = smc_dpm_table->TotalBoardPower;
|
||||
smc_pptable->BoardPadding = smc_dpm_table->BoardPadding;
|
||||
|
||||
/* Mvdd Svi2 Div Ratio Setting */
|
||||
smc_pptable->MvddRatio = smc_dpm_table->MvddRatio;
|
||||
switch (smc_dpm_table->table_header.content_revision) {
|
||||
case 5: /* nv10 and nv14 */
|
||||
memcpy(smc_pptable->I2cControllers, smc_dpm_table->I2cControllers,
|
||||
sizeof(*smc_dpm_table) - sizeof(smc_dpm_table->table_header));
|
||||
break;
|
||||
case 7: /* nv12 */
|
||||
ret = smu_get_atom_data_table(smu, index, NULL, NULL, NULL,
|
||||
(uint8_t **)&smc_dpm_table_v4_7);
|
||||
if (ret)
|
||||
return ret;
|
||||
memcpy(smc_pptable->I2cControllers, smc_dpm_table_v4_7->I2cControllers,
|
||||
sizeof(*smc_dpm_table_v4_7) - sizeof(smc_dpm_table_v4_7->table_header));
|
||||
break;
|
||||
default:
|
||||
pr_err("smc_dpm_info with unsupported content revision %d!\n",
|
||||
smc_dpm_table->table_header.content_revision);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (adev->pm.pp_feature & PP_GFXOFF_MASK) {
|
||||
/* TODO: remove it once SMU fw fix it */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user