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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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03b0f2ce73
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAl0006weHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGaDUIAJ4oTyVWpMRZkfG6 vVY8qVMU3zlzEqRiyLYjkXoe/mGpuU/UVTyyStllxZ+Gg9da0mGwlugScKriPJof 4KRUDDTGX5DrfEOo+0brKvM+PYh9uGViPgKXzyv7i6BrnX2z3JdBR4bKNuEYlAJ9 N93Qg7v05SBHIq2Gfp3klrdWbsTTW2EaDTLbcgifXLnfKyFr47kwsmXAHPlTFP0p dYsZHHmf14Y9n1+ToZeVINgjQFr6mFn6ygY/PqTnd6vCgEEfP9eENJ4BZCtN1ZL/ V0BO9MyJ5iZV0AfwSEKydk+kDEvO16TG/nyDrECVuur7AXsBx18ZplVc787f6GK+ dyCQJ3U= =XLAF -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXTYRHQAKCRDj7w1vZxhR xY5IAQC0H/r62rlFq+JpbmksutMqvIferowP7HUk6yOaAKdVawD/c1qsTk/xxI0x StrxRCDqeGA7D2R/ZNb/4sobnn7+oAM= =k9CF -----END PGP SIGNATURE----- Merge v5.3-rc1 into drm-misc-next Noralf needs some SPI patches in 5.3 to merge some work on tinydrm. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
565 lines
15 KiB
C
565 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 Broadcom
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*/
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/**
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* DOC: VC4 KMS
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*
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* This is the general code for implementing KMS mode setting that
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* doesn't clearly associate with any of the other objects (plane,
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* crtc, HDMI encoder).
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*/
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_vblank.h>
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#include "vc4_drv.h"
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#include "vc4_regs.h"
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struct vc4_ctm_state {
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struct drm_private_state base;
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struct drm_color_ctm *ctm;
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int fifo;
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};
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static struct vc4_ctm_state *to_vc4_ctm_state(struct drm_private_state *priv)
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{
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return container_of(priv, struct vc4_ctm_state, base);
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}
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struct vc4_load_tracker_state {
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struct drm_private_state base;
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u64 hvs_load;
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u64 membus_load;
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};
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static struct vc4_load_tracker_state *
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to_vc4_load_tracker_state(struct drm_private_state *priv)
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{
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return container_of(priv, struct vc4_load_tracker_state, base);
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}
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static struct vc4_ctm_state *vc4_get_ctm_state(struct drm_atomic_state *state,
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struct drm_private_obj *manager)
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{
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struct drm_device *dev = state->dev;
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struct vc4_dev *vc4 = dev->dev_private;
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struct drm_private_state *priv_state;
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int ret;
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ret = drm_modeset_lock(&vc4->ctm_state_lock, state->acquire_ctx);
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if (ret)
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return ERR_PTR(ret);
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priv_state = drm_atomic_get_private_obj_state(state, manager);
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if (IS_ERR(priv_state))
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return ERR_CAST(priv_state);
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return to_vc4_ctm_state(priv_state);
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}
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static struct drm_private_state *
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vc4_ctm_duplicate_state(struct drm_private_obj *obj)
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{
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struct vc4_ctm_state *state;
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state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
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if (!state)
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return NULL;
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__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
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return &state->base;
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}
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static void vc4_ctm_destroy_state(struct drm_private_obj *obj,
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struct drm_private_state *state)
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{
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struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(state);
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kfree(ctm_state);
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}
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static const struct drm_private_state_funcs vc4_ctm_state_funcs = {
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.atomic_duplicate_state = vc4_ctm_duplicate_state,
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.atomic_destroy_state = vc4_ctm_destroy_state,
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};
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/* Converts a DRM S31.32 value to the HW S0.9 format. */
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static u16 vc4_ctm_s31_32_to_s0_9(u64 in)
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{
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u16 r;
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/* Sign bit. */
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r = in & BIT_ULL(63) ? BIT(9) : 0;
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if ((in & GENMASK_ULL(62, 32)) > 0) {
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/* We have zero integer bits so we can only saturate here. */
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r |= GENMASK(8, 0);
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} else {
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/* Otherwise take the 9 most important fractional bits. */
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r |= (in >> 23) & GENMASK(8, 0);
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}
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return r;
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}
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static void
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vc4_ctm_commit(struct vc4_dev *vc4, struct drm_atomic_state *state)
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{
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struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(vc4->ctm_manager.state);
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struct drm_color_ctm *ctm = ctm_state->ctm;
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if (ctm_state->fifo) {
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HVS_WRITE(SCALER_OLEDCOEF2,
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]),
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SCALER_OLEDCOEF2_R_TO_R) |
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]),
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SCALER_OLEDCOEF2_R_TO_G) |
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]),
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SCALER_OLEDCOEF2_R_TO_B));
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HVS_WRITE(SCALER_OLEDCOEF1,
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]),
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SCALER_OLEDCOEF1_G_TO_R) |
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]),
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SCALER_OLEDCOEF1_G_TO_G) |
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]),
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SCALER_OLEDCOEF1_G_TO_B));
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HVS_WRITE(SCALER_OLEDCOEF0,
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]),
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SCALER_OLEDCOEF0_B_TO_R) |
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]),
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SCALER_OLEDCOEF0_B_TO_G) |
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VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[8]),
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SCALER_OLEDCOEF0_B_TO_B));
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}
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HVS_WRITE(SCALER_OLEDOFFS,
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VC4_SET_FIELD(ctm_state->fifo, SCALER_OLEDOFFS_DISPFIFO));
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}
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static void
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vc4_atomic_complete_commit(struct drm_atomic_state *state)
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{
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struct drm_device *dev = state->dev;
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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struct vc4_crtc *vc4_crtc;
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int i;
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for (i = 0; i < dev->mode_config.num_crtc; i++) {
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if (!state->crtcs[i].ptr || !state->crtcs[i].commit)
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continue;
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vc4_crtc = to_vc4_crtc(state->crtcs[i].ptr);
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vc4_hvs_mask_underrun(dev, vc4_crtc->channel);
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}
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drm_atomic_helper_wait_for_fences(dev, state, false);
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drm_atomic_helper_wait_for_dependencies(state);
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drm_atomic_helper_commit_modeset_disables(dev, state);
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vc4_ctm_commit(vc4, state);
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drm_atomic_helper_commit_planes(dev, state, 0);
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drm_atomic_helper_commit_modeset_enables(dev, state);
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drm_atomic_helper_fake_vblank(state);
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drm_atomic_helper_commit_hw_done(state);
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drm_atomic_helper_wait_for_flip_done(dev, state);
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drm_atomic_helper_cleanup_planes(dev, state);
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drm_atomic_helper_commit_cleanup_done(state);
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drm_atomic_state_put(state);
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up(&vc4->async_modeset);
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}
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static void commit_work(struct work_struct *work)
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{
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struct drm_atomic_state *state = container_of(work,
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struct drm_atomic_state,
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commit_work);
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vc4_atomic_complete_commit(state);
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}
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/**
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* vc4_atomic_commit - commit validated state object
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* @dev: DRM device
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* @state: the driver state object
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* @nonblock: nonblocking commit
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*
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* This function commits a with drm_atomic_helper_check() pre-validated state
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* object. This can still fail when e.g. the framebuffer reservation fails. For
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* now this doesn't implement asynchronous commits.
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*
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* RETURNS
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* Zero for success or -errno.
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*/
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static int vc4_atomic_commit(struct drm_device *dev,
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struct drm_atomic_state *state,
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bool nonblock)
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{
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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int ret;
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if (state->async_update) {
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ret = down_interruptible(&vc4->async_modeset);
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if (ret)
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return ret;
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ret = drm_atomic_helper_prepare_planes(dev, state);
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if (ret) {
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up(&vc4->async_modeset);
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return ret;
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}
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drm_atomic_helper_async_commit(dev, state);
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drm_atomic_helper_cleanup_planes(dev, state);
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up(&vc4->async_modeset);
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return 0;
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}
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/* We know for sure we don't want an async update here. Set
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* state->legacy_cursor_update to false to prevent
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* drm_atomic_helper_setup_commit() from auto-completing
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* commit->flip_done.
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*/
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state->legacy_cursor_update = false;
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ret = drm_atomic_helper_setup_commit(state, nonblock);
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if (ret)
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return ret;
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INIT_WORK(&state->commit_work, commit_work);
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ret = down_interruptible(&vc4->async_modeset);
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if (ret)
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return ret;
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ret = drm_atomic_helper_prepare_planes(dev, state);
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if (ret) {
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up(&vc4->async_modeset);
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return ret;
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}
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if (!nonblock) {
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ret = drm_atomic_helper_wait_for_fences(dev, state, true);
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if (ret) {
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drm_atomic_helper_cleanup_planes(dev, state);
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up(&vc4->async_modeset);
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return ret;
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}
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}
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/*
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* This is the point of no return - everything below never fails except
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* when the hw goes bonghits. Which means we can commit the new state on
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* the software side now.
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*/
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BUG_ON(drm_atomic_helper_swap_state(state, false) < 0);
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/*
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* Everything below can be run asynchronously without the need to grab
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* any modeset locks at all under one condition: It must be guaranteed
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* that the asynchronous work has either been cancelled (if the driver
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* supports it, which at least requires that the framebuffers get
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* cleaned up with drm_atomic_helper_cleanup_planes()) or completed
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* before the new state gets committed on the software side with
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* drm_atomic_helper_swap_state().
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*
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* This scheme allows new atomic state updates to be prepared and
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* checked in parallel to the asynchronous completion of the previous
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* update. Which is important since compositors need to figure out the
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* composition of the next frame right after having submitted the
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* current layout.
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*/
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drm_atomic_state_get(state);
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if (nonblock)
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queue_work(system_unbound_wq, &state->commit_work);
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else
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vc4_atomic_complete_commit(state);
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return 0;
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}
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static struct drm_framebuffer *vc4_fb_create(struct drm_device *dev,
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struct drm_file *file_priv,
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const struct drm_mode_fb_cmd2 *mode_cmd)
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{
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struct drm_mode_fb_cmd2 mode_cmd_local;
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/* If the user didn't specify a modifier, use the
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* vc4_set_tiling_ioctl() state for the BO.
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*/
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if (!(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
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struct drm_gem_object *gem_obj;
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struct vc4_bo *bo;
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gem_obj = drm_gem_object_lookup(file_priv,
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mode_cmd->handles[0]);
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if (!gem_obj) {
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DRM_DEBUG("Failed to look up GEM BO %d\n",
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mode_cmd->handles[0]);
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return ERR_PTR(-ENOENT);
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}
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bo = to_vc4_bo(gem_obj);
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mode_cmd_local = *mode_cmd;
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if (bo->t_format) {
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mode_cmd_local.modifier[0] =
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DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
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} else {
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mode_cmd_local.modifier[0] = DRM_FORMAT_MOD_NONE;
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}
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drm_gem_object_put_unlocked(gem_obj);
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mode_cmd = &mode_cmd_local;
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}
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return drm_gem_fb_create(dev, file_priv, mode_cmd);
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}
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/* Our CTM has some peculiar limitations: we can only enable it for one CRTC
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* at a time and the HW only supports S0.9 scalars. To account for the latter,
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* we don't allow userland to set a CTM that we have no hope of approximating.
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*/
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static int
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vc4_ctm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
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{
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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struct vc4_ctm_state *ctm_state = NULL;
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struct drm_crtc *crtc;
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struct drm_crtc_state *old_crtc_state, *new_crtc_state;
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struct drm_color_ctm *ctm;
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int i;
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for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
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/* CTM is being disabled. */
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if (!new_crtc_state->ctm && old_crtc_state->ctm) {
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ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
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if (IS_ERR(ctm_state))
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return PTR_ERR(ctm_state);
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ctm_state->fifo = 0;
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}
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}
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for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
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if (new_crtc_state->ctm == old_crtc_state->ctm)
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continue;
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if (!ctm_state) {
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ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
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if (IS_ERR(ctm_state))
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return PTR_ERR(ctm_state);
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}
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/* CTM is being enabled or the matrix changed. */
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if (new_crtc_state->ctm) {
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/* fifo is 1-based since 0 disables CTM. */
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int fifo = to_vc4_crtc(crtc)->channel + 1;
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/* Check userland isn't trying to turn on CTM for more
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* than one CRTC at a time.
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*/
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if (ctm_state->fifo && ctm_state->fifo != fifo) {
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DRM_DEBUG_DRIVER("Too many CTM configured\n");
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return -EINVAL;
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}
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/* Check we can approximate the specified CTM.
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* We disallow scalars |c| > 1.0 since the HW has
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* no integer bits.
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*/
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ctm = new_crtc_state->ctm->data;
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for (i = 0; i < ARRAY_SIZE(ctm->matrix); i++) {
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u64 val = ctm->matrix[i];
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val &= ~BIT_ULL(63);
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if (val > BIT_ULL(32))
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return -EINVAL;
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}
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ctm_state->fifo = fifo;
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ctm_state->ctm = ctm;
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}
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}
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return 0;
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}
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static int vc4_load_tracker_atomic_check(struct drm_atomic_state *state)
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{
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struct drm_plane_state *old_plane_state, *new_plane_state;
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struct vc4_dev *vc4 = to_vc4_dev(state->dev);
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struct vc4_load_tracker_state *load_state;
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struct drm_private_state *priv_state;
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struct drm_plane *plane;
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int i;
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priv_state = drm_atomic_get_private_obj_state(state,
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&vc4->load_tracker);
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if (IS_ERR(priv_state))
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return PTR_ERR(priv_state);
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load_state = to_vc4_load_tracker_state(priv_state);
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for_each_oldnew_plane_in_state(state, plane, old_plane_state,
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new_plane_state, i) {
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struct vc4_plane_state *vc4_plane_state;
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if (old_plane_state->fb && old_plane_state->crtc) {
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vc4_plane_state = to_vc4_plane_state(old_plane_state);
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load_state->membus_load -= vc4_plane_state->membus_load;
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load_state->hvs_load -= vc4_plane_state->hvs_load;
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}
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if (new_plane_state->fb && new_plane_state->crtc) {
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vc4_plane_state = to_vc4_plane_state(new_plane_state);
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load_state->membus_load += vc4_plane_state->membus_load;
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load_state->hvs_load += vc4_plane_state->hvs_load;
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}
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}
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/* Don't check the load when the tracker is disabled. */
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if (!vc4->load_tracker_enabled)
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return 0;
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/* The absolute limit is 2Gbyte/sec, but let's take a margin to let
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* the system work when other blocks are accessing the memory.
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*/
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if (load_state->membus_load > SZ_1G + SZ_512M)
|
|
return -ENOSPC;
|
|
|
|
/* HVS clock is supposed to run @ 250Mhz, let's take a margin and
|
|
* consider the maximum number of cycles is 240M.
|
|
*/
|
|
if (load_state->hvs_load > 240000000ULL)
|
|
return -ENOSPC;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct drm_private_state *
|
|
vc4_load_tracker_duplicate_state(struct drm_private_obj *obj)
|
|
{
|
|
struct vc4_load_tracker_state *state;
|
|
|
|
state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
|
|
if (!state)
|
|
return NULL;
|
|
|
|
__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
|
|
|
|
return &state->base;
|
|
}
|
|
|
|
static void vc4_load_tracker_destroy_state(struct drm_private_obj *obj,
|
|
struct drm_private_state *state)
|
|
{
|
|
struct vc4_load_tracker_state *load_state;
|
|
|
|
load_state = to_vc4_load_tracker_state(state);
|
|
kfree(load_state);
|
|
}
|
|
|
|
static const struct drm_private_state_funcs vc4_load_tracker_state_funcs = {
|
|
.atomic_duplicate_state = vc4_load_tracker_duplicate_state,
|
|
.atomic_destroy_state = vc4_load_tracker_destroy_state,
|
|
};
|
|
|
|
static int
|
|
vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
|
|
{
|
|
int ret;
|
|
|
|
ret = vc4_ctm_atomic_check(dev, state);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = drm_atomic_helper_check(dev, state);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return vc4_load_tracker_atomic_check(state);
|
|
}
|
|
|
|
static const struct drm_mode_config_funcs vc4_mode_funcs = {
|
|
.atomic_check = vc4_atomic_check,
|
|
.atomic_commit = vc4_atomic_commit,
|
|
.fb_create = vc4_fb_create,
|
|
};
|
|
|
|
int vc4_kms_load(struct drm_device *dev)
|
|
{
|
|
struct vc4_dev *vc4 = to_vc4_dev(dev);
|
|
struct vc4_ctm_state *ctm_state;
|
|
struct vc4_load_tracker_state *load_state;
|
|
int ret;
|
|
|
|
/* Start with the load tracker enabled. Can be disabled through the
|
|
* debugfs load_tracker file.
|
|
*/
|
|
vc4->load_tracker_enabled = true;
|
|
|
|
sema_init(&vc4->async_modeset, 1);
|
|
|
|
/* Set support for vblank irq fast disable, before drm_vblank_init() */
|
|
dev->vblank_disable_immediate = true;
|
|
|
|
dev->irq_enabled = true;
|
|
ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
|
|
if (ret < 0) {
|
|
dev_err(dev->dev, "failed to initialize vblank\n");
|
|
return ret;
|
|
}
|
|
|
|
dev->mode_config.max_width = 2048;
|
|
dev->mode_config.max_height = 2048;
|
|
dev->mode_config.funcs = &vc4_mode_funcs;
|
|
dev->mode_config.preferred_depth = 24;
|
|
dev->mode_config.async_page_flip = true;
|
|
dev->mode_config.allow_fb_modifiers = true;
|
|
|
|
drm_modeset_lock_init(&vc4->ctm_state_lock);
|
|
|
|
ctm_state = kzalloc(sizeof(*ctm_state), GFP_KERNEL);
|
|
if (!ctm_state)
|
|
return -ENOMEM;
|
|
|
|
drm_atomic_private_obj_init(dev, &vc4->ctm_manager, &ctm_state->base,
|
|
&vc4_ctm_state_funcs);
|
|
|
|
load_state = kzalloc(sizeof(*load_state), GFP_KERNEL);
|
|
if (!load_state) {
|
|
drm_atomic_private_obj_fini(&vc4->ctm_manager);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_atomic_private_obj_init(dev, &vc4->load_tracker, &load_state->base,
|
|
&vc4_load_tracker_state_funcs);
|
|
|
|
drm_mode_config_reset(dev);
|
|
|
|
drm_kms_helper_poll_init(dev);
|
|
|
|
return 0;
|
|
}
|