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dbb26e53e5
The HSDIV outputs of DSI PLL (and also other PLLs) all have the same bit width for the divider value. Simplify the code by merging HSDIV divider widths into one width. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> |
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backlight | ||
console | ||
fbdev | ||
logo | ||
display_timing.c | ||
hdmi.c | ||
Kconfig | ||
Makefile | ||
of_display_timing.c | ||
of_videomode.c | ||
vgastate.c | ||
videomode.c |