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OMAPDSS: DSI: features: combine dsi & dispc hsdivs
The HSDIV outputs of DSI PLL (and also other PLLs) all have the same bit width for the divider value. Simplify the code by merging HSDIV divider widths into one width. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -374,7 +374,7 @@ struct dsi_data {
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#endif
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/* DSI PLL Parameter Ranges */
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unsigned long regm_max, regn_max;
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unsigned long regm_dispc_max, regm_dsi_max;
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unsigned long regm_hsdiv_max;
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unsigned long fint_min, fint_max;
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unsigned long lpdiv_max;
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@ -1414,7 +1414,7 @@ bool dsi_hsdiv_calc(struct platform_device *dsidev, unsigned long pll,
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out_max = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);
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regm_start = max(DIV_ROUND_UP(pll, out_max), 1ul);
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regm_stop = min(pll / out_min, dsi->regm_dispc_max);
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regm_stop = min(pll / out_min, dsi->regm_hsdiv_max);
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for (regm = regm_start; regm <= regm_stop; ++regm) {
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out = pll / regm;
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@ -1477,10 +1477,10 @@ static int dsi_calc_clock_rates(struct platform_device *dsidev,
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if (cinfo->regm == 0 || cinfo->regm > dsi->regm_max)
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return -EINVAL;
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if (cinfo->regm_hsdiv[HSDIV_DISPC] > dsi->regm_dispc_max)
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if (cinfo->regm_hsdiv[HSDIV_DISPC] > dsi->regm_hsdiv_max)
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return -EINVAL;
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if (cinfo->regm_hsdiv[HSDIV_DSI] > dsi->regm_dsi_max)
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if (cinfo->regm_hsdiv[HSDIV_DSI] > dsi->regm_hsdiv_max)
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return -EINVAL;
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cinfo->fint = clk_get_rate(dsi->sys_clk) / cinfo->regn;
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@ -5232,9 +5232,8 @@ static void dsi_calc_clock_param_ranges(struct platform_device *dsidev)
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dsi->regn_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGN);
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dsi->regm_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM);
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dsi->regm_dispc_max =
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dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM_DISPC);
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dsi->regm_dsi_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM_DSI);
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dsi->regm_hsdiv_max =
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dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM_HSDIV);
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dsi->fint_min = dss_feat_get_param_min(FEAT_PARAM_DSIPLL_FINT);
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dsi->fint_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_FINT);
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dsi->lpdiv_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_LPDIV);
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@ -439,8 +439,7 @@ static const struct dss_param_range omap2_dss_param_range[] = {
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[FEAT_PARAM_DSS_PCD] = { 2, 255 },
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[FEAT_PARAM_DSIPLL_REGN] = { 0, 0 },
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[FEAT_PARAM_DSIPLL_REGM] = { 0, 0 },
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[FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 },
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[FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 },
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[FEAT_PARAM_DSIPLL_REGM_HSDIV] = { 0, 0 },
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[FEAT_PARAM_DSIPLL_FINT] = { 0, 0 },
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[FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 },
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[FEAT_PARAM_DOWNSCALE] = { 1, 2 },
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@ -456,8 +455,7 @@ static const struct dss_param_range omap3_dss_param_range[] = {
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 },
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[FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_HSDIV] = { 0, (1 << 4) - 1 },
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[FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 },
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[FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
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[FEAT_PARAM_DSI_FCK] = { 0, 173000000 },
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@ -477,8 +475,7 @@ static const struct dss_param_range omap4_dss_param_range[] = {
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
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[FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_HSDIV] = { 0, (1 << 5) - 1 },
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[FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
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[FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
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[FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
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@ -491,8 +488,7 @@ static const struct dss_param_range omap5_dss_param_range[] = {
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
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[FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
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[FEAT_PARAM_DSIPLL_REGM_HSDIV] = { 0, (1 << 5) - 1 },
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[FEAT_PARAM_DSIPLL_FINT] = { 150000, 52000000 },
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[FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
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[FEAT_PARAM_DSI_FCK] = { 0, 209250000 },
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@ -88,8 +88,7 @@ enum dss_range_param {
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FEAT_PARAM_DSS_PCD,
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FEAT_PARAM_DSIPLL_REGN,
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FEAT_PARAM_DSIPLL_REGM,
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FEAT_PARAM_DSIPLL_REGM_DISPC,
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FEAT_PARAM_DSIPLL_REGM_DSI,
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FEAT_PARAM_DSIPLL_REGM_HSDIV,
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FEAT_PARAM_DSIPLL_FINT,
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FEAT_PARAM_DSIPLL_LPDIV,
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FEAT_PARAM_DSI_FCK,
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