mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 02:37:15 +07:00
dae320ec31
DRA7 SoC has the capability to support DDR memory upto 4GB. In order to represent this in memory dt node, the address-cells and size cells should be 2. So, changing the address-cells and size-cells to 2 and updating the memory nodes accordingly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
618 lines
16 KiB
Plaintext
618 lines
16 KiB
Plaintext
/*
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* Support for CompuLab CL-SOM-AM57x System-on-Module
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*
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* Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
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* Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "dra74x.dtsi"
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/ {
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model = "CompuLab CL-SOM-AM57x";
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compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
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memory {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins_default>;
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led@0 {
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label = "cl-som-am57x:green";
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gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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};
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vdd_3v3: fixedregulator-vdd_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vdd_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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ads7846reg: fixedregulator-ads7846-reg {
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compatible = "regulator-fixed";
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regulator-name = "ads7846-reg";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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sound0: sound@0 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "CL-SOM-AM57x-Sound-Card";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&dailink0_master>;
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simple-audio-card,frame-master = <&dailink0_master>;
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack",
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"Microphone", "Microphone Jack",
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"Line", "Line Jack";
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simple-audio-card,routing =
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"Headphone Jack", "RHPOUT",
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"Headphone Jack", "LHPOUT",
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"LLINEIN", "Line Jack",
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"MICIN", "Mic Bias",
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"Mic Bias", "Microphone Jack";
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dailink0_master: simple-audio-card,cpu {
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sound-dai = <&mcasp3>;
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};
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simple-audio-card,codec {
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sound-dai = <&wm8731>;
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system-clock-frequency = <12000000>;
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};
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};
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};
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&dra7_pmx_core {
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leds_pins_default: leds_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */
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>;
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};
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i2c1_pins_default: i2c1_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
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DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
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>;
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};
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i2c3_pins_default: i2c3_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
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DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
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>;
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};
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i2c4_pins_default: i2c4_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */
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DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */
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>;
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};
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tps659038_pins_default: tps659038_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
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>;
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};
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mmc2_pins_default: mmc2_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
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DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
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DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
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DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
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DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
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DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
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DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
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DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
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DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
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DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
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>;
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};
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qspi1_pins: pinmux_qspi1_pins {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
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DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */
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DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d1 */
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DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
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DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
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DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
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>;
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};
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cpsw_pins_default: cpsw_pins_default {
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pinctrl-single,pins = <
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/* Slave at addr 0x0 */
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DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */
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DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tctl */
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DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3 */
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DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td2 */
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DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td1 */
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DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td0 */
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DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */
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DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */
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DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */
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DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */
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DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */
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DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */
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/* Slave at addr 0x1 */
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DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_tclk */
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DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
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DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
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DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
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DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
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DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
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DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
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DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
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DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
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DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
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DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
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DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
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>;
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};
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cpsw_pins_sleep: cpsw_pins_sleep {
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pinctrl-single,pins = <
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/* Slave 1 */
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DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
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/* Slave 2 */
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DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
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>;
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};
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davinci_mdio_pins_default: davinci_mdio_pins_default {
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pinctrl-single,pins = <
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/* MDIO */
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DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */
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DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */
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>;
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};
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davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15)
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>;
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};
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ads7846_pins: pinmux_ads7846_pins {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */
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>;
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};
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mcasp3_pins_default: mcasp3_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
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DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
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DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
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DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
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>;
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};
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mcasp3_pins_sleep: mcasp3_pins_sleep {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
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DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
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>;
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};
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};
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&i2c1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins_default>;
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clock-frequency = <400000>;
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};
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&i2c3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_pins_default>;
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clock-frequency = <400000>;
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};
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&i2c4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_pins_default>;
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clock-frequency = <400000>;
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tps659038: tps659038@58 {
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compatible = "ti,tps659038";
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reg = <0x58>;
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interrupt-parent = <&gpio1>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&tps659038_pins_default>;
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#interrupt-cells = <2>;
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interrupt-controller;
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ti,system-power-controller;
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tps659038_pmic {
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compatible = "ti,tps659038-pmic";
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regulators {
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smps12_reg: smps12 {
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/* VDD_MPU */
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regulator-name = "smps12";
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regulator-min-microvolt = < 850000>;
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regulator-max-microvolt = <1250000>;
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regulator-always-on;
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regulator-boot-on;
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};
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smps3_reg: smps3 {
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/* VDD_DDR */
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regulator-name = "smps3";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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};
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smps45_reg: smps45 {
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/* VDD_DSPEVE */
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regulator-name = "smps45";
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regulator-min-microvolt = < 850000>;
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regulator-max-microvolt = <1250000>;
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regulator-always-on;
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regulator-boot-on;
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};
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smps6_reg: smps6 {
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/* VDD_GPU */
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regulator-name = "smps6";
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regulator-min-microvolt = < 850000>;
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regulator-max-microvolt = <1250000>;
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regulator-always-on;
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regulator-boot-on;
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};
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smps7_reg: smps7 {
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/* VDD_CORE */
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regulator-name = "smps7";
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regulator-min-microvolt = < 850000>;
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regulator-max-microvolt = <1160000>;
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regulator-always-on;
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regulator-boot-on;
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};
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smps8_reg: smps8 {
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/* VDD_IVA */
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regulator-name = "smps8";
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regulator-min-microvolt = < 850000>;
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regulator-max-microvolt = <1250000>;
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regulator-always-on;
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regulator-boot-on;
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};
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smps9_reg: smps9 {
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/* PMIC_3V3 */
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regulator-name = "smps9";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo1_reg: ldo1 {
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/* VDD_SD / VDDSHV8 */
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regulator-name = "ldo1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2_reg: ldo2 {
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/* VDD_1V8 */
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regulator-name = "ldo2";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo3_reg: ldo3 {
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/* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */
|
|
regulator-name = "ldo3";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo4_reg: ldo4 {
|
|
/* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */
|
|
regulator-name = "ldo4";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo9_reg: ldo9 {
|
|
/* VDD_RTC */
|
|
regulator-name = "ldo9";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldoln_reg: ldoln {
|
|
/* VDDA_1V8_PLL */
|
|
regulator-name = "ldoln";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldousb_reg: ldousb {
|
|
/* VDDA_3V_USB: VDDA_USBHS33 */
|
|
regulator-name = "ldousb";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
/* regen1 not used */
|
|
};
|
|
};
|
|
|
|
tps659038_pwr_button: tps659038_pwr_button {
|
|
compatible = "ti,palmas-pwrbutton";
|
|
interrupt-parent = <&tps659038>;
|
|
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
|
wakeup-source;
|
|
ti,palmas-long-press-seconds = <12>;
|
|
};
|
|
|
|
tps659038_gpio: tps659038_gpio {
|
|
compatible = "ti,palmas-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
};
|
|
|
|
rtc0: rtc@56 {
|
|
compatible = "emmicro,em3027";
|
|
reg = <0x56>;
|
|
};
|
|
|
|
eeprom_module: atmel@50 {
|
|
compatible = "atmel,24c08";
|
|
reg = <0x50>;
|
|
pagesize = <16>;
|
|
};
|
|
|
|
wm8731: wm8731@1a {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "wlf,wm8731";
|
|
reg = <0x1a>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu0-supply = <&smps12_reg>;
|
|
voltage-tolerance = <1>;
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
};
|
|
|
|
&mailbox5 {
|
|
status = "okay";
|
|
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
|
|
status = "okay";
|
|
};
|
|
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&mailbox6 {
|
|
status = "okay";
|
|
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
|
|
status = "okay";
|
|
};
|
|
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&mmc2 {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc2_pins_default>;
|
|
|
|
vmmc-supply = <&vdd_3v3>;
|
|
bus-width = <8>;
|
|
ti,non-removable;
|
|
cap-mmc-dual-data-rate;
|
|
};
|
|
|
|
&qspi {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&qspi1_pins>;
|
|
|
|
spi-max-frequency = <20000000>;
|
|
|
|
spi_flash: spi_flash@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "spansion,m25p80", "jedec,spi-nor";
|
|
reg = <0>; /* CS0 */
|
|
spi-max-frequency = <20000000>;
|
|
|
|
partition@0 {
|
|
label = "uboot";
|
|
reg = <0x0 0xc0000>;
|
|
};
|
|
|
|
partition@c0000 {
|
|
label = "uboot environment";
|
|
reg = <0xc0000 0x40000>;
|
|
};
|
|
|
|
partition@100000 {
|
|
label = "reserved";
|
|
reg = <0x100000 0x0>;
|
|
};
|
|
};
|
|
|
|
/* touch controller */
|
|
ads7846@0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ads7846_pins>;
|
|
|
|
compatible = "ti,ads7846";
|
|
vcc-supply = <&ads7846reg>;
|
|
|
|
reg = <1>; /* CS1 */
|
|
spi-max-frequency = <1500000>;
|
|
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <31 0>;
|
|
pendown-gpio = <&gpio1 31 0>;
|
|
|
|
|
|
ti,x-min = /bits/ 16 <0x0>;
|
|
ti,x-max = /bits/ 16 <0x0fff>;
|
|
ti,y-min = /bits/ 16 <0x0>;
|
|
ti,y-max = /bits/ 16 <0x0fff>;
|
|
|
|
ti,x-plate-ohms = /bits/ 16 <180>;
|
|
ti,pressure-max = /bits/ 16 <255>;
|
|
|
|
ti,debounce-max = /bits/ 16 <30>;
|
|
ti,debounce-tol = /bits/ 16 <10>;
|
|
ti,debounce-rep = /bits/ 16 <1>;
|
|
|
|
linux,wakeup;
|
|
};
|
|
};
|
|
|
|
&mac {
|
|
status = "okay";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&cpsw_pins_default>;
|
|
pinctrl-1 = <&cpsw_pins_sleep>;
|
|
dual_emac;
|
|
};
|
|
|
|
&cpsw_emac0 {
|
|
phy_id = <&davinci_mdio>, <0>;
|
|
phy-mode = "rgmii";
|
|
dual_emac_res_vlan = <0>;
|
|
};
|
|
|
|
&cpsw_emac1 {
|
|
phy_id = <&davinci_mdio>, <1>;
|
|
phy-mode = "rgmii";
|
|
dual_emac_res_vlan = <1>;
|
|
};
|
|
|
|
&davinci_mdio {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&davinci_mdio_pins_default>;
|
|
pinctrl-1 = <&davinci_mdio_pins_sleep>;
|
|
};
|
|
|
|
&usb2_phy1 {
|
|
phy-supply = <&ldousb_reg>;
|
|
};
|
|
|
|
&usb2_phy2 {
|
|
phy-supply = <&ldousb_reg>;
|
|
};
|
|
|
|
&usb1 {
|
|
dr_mode = "host";
|
|
};
|
|
|
|
&usb2 {
|
|
dr_mode = "peripheral";
|
|
};
|
|
|
|
&mcasp3 {
|
|
#sound-dai-cells = <0>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&mcasp3_pins_default>;
|
|
pinctrl-1 = <&mcasp3_pins_sleep>;
|
|
status = "okay";
|
|
|
|
op-mode = <0>; /* MCASP_IIS_MODE */
|
|
tdm-slots = <2>;
|
|
/* 4 serializers */
|
|
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
|
1 2 0 0
|
|
>;
|
|
};
|
|
|
|
&gpio3 {
|
|
status = "okay";
|
|
ti,no-reset-on-init;
|
|
};
|
|
|
|
&gpio2 {
|
|
status = "okay";
|
|
ti,no-reset-on-init;
|
|
};
|