linux_dsm_epyc7002/arch/arc/kernel
Vineet Gupta 0d7b8855a0 ARCv2: STAR 9000808988: signals involving Delay Slot
Reported by Anton as LTP:munmap01 failing with Illegal Instruction
Exception.

   --------------------->8--------------------------------------
   mmap2(NULL, 24576, PROT_READ|PROT_WRITE, MAP_SHARED, 3, 0) = 0x200d2000
   munmap(0x200d2000, 24576)               = 0
   --- SIGSEGV {si_signo=SIGSEGV, si_code=SEGV_MAPERR, si_addr=0x200d2000}
   ---
   potentially unexpected fatal signal 4.
   Path: /munmap01
   CPU: 0 PID: 61 Comm: munmap01 Not tainted 3.13.0-g5d5c46d9a556 #8
   task: 9f1a8000 ti: 9f154000 task.ti: 9f154000

   [ECR   ]: 0x00020100 => Illegal Insn
   [EFA   ]: 0x0001354c
   [BLINK ]: 0x200515d4
   [ERET  ]: 0x1354c
       @off 0x1354c in [/munmap01]
       VMA: 0x00010000 to 0x00018000
   [STAT32]: 0x800802c0
   ...
   --------------------->8--------------------------------------

The issue was
1. munmap01 accessed unmapped memory (on purpose) with signal handler
   installed for SIGSEGV

2. The faulting instruction happened to be in Delay Slot
   00011864 <main>:
      11908:	bl.d       13284 <tst_resm>
      1190c:	stb        r16,[r2]

3. kernel sets up the reg file for signal handler and correctly clears
   the DE bit in pt_regs->status32 placeholder

4. However RESTORE_CALLEE_SAVED_USER macro is not adjusted for ARCv2,
   and it over-writes the above with orig/stale value of status32

5. After RTIE, userspace signal handler executes a non branch
   instruction with DE bit set, triggering Illegal Instruction Exception.

Reported-by: Anton Kolesov <akolesov@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-22 14:06:55 +05:30
..
.gitignore
arc_hostlink.c
arcksyms.c
asm-offsets.c ARCv2: STAR 9000808988: signals involving Delay Slot 2015-06-22 14:06:55 +05:30
clk.c
ctx_sw_asm.S
ctx_sw.c
devtree.c ARC: [axs101] support early 8250 uart 2015-06-19 18:09:30 +05:30
disasm.c
entry-arcv2.S ARCv2: STAR 9000793984: Handle return from intr to Delay Slot 2015-06-22 14:06:55 +05:30
entry-compact.S ARC: entry.S: use single EXCEPTION_PROLOGUE 2015-06-19 18:09:39 +05:30
entry.S ARC: entry.S: micro-optimize Trap handler 2015-06-19 18:09:39 +05:30
fpu.c
head.S ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
intc-arcv2.c ARCv2: [intc] HS38 core interrupt controller 2015-06-22 14:06:55 +05:30
intc-compact.c ARC: intc: split into ARCompact ISA specific, common bits 2015-06-19 18:09:40 +05:30
irq.c ARC: intc: split into ARCompact ISA specific, common bits 2015-06-19 18:09:40 +05:30
kgdb.c
kprobes.c
Makefile ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
module.c
perf_event.c ARC: perf: Remove unnecessary local variable 2015-06-19 18:09:28 +05:30
process.c ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
ptrace.c ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
reset.c
setup.c ARCv2: STAR 9000793984: Handle return from intr to Delay Slot 2015-06-22 14:06:55 +05:30
signal.c ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
smp.c ARC: fix section mismatch with allyesconfig 2015-06-19 18:09:27 +05:30
stacktrace.c ARC: stack unwinder to bail if PC is not kernel mode 2015-06-19 18:09:29 +05:30
sys.c
time.c ARC: clocksource cleanups 2015-06-19 18:09:25 +05:30
traps.c
troubleshoot.c ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
unaligned.c
unwind.c
vmlinux.lds.S