linux_dsm_epyc7002/arch/powerpc/include
Nicholas Piggin ccd477028a powerpc/64s: Fix HV NMI vs HV interrupt recoverability test
HV interrupts that use HSRR registers do not enter with MSR[RI] clear,
but their entry code is not recoverable vs NMI, due to shared use of
HSPRG1 as a scratch register to save r13.

This means that a system reset or machine check that hits in HSRR
interrupt entry can cause r13 to be silently corrupted.

Fix this by marking NMIs non-recoverable if they land in HV interrupt
ranges.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2019-02-26 23:28:24 +11:00
..
asm powerpc/64s: Fix HV NMI vs HV interrupt recoverability test 2019-02-26 23:28:24 +11:00
uapi/asm powerpc/perf: Update perf_regs structure to include MMCRA 2019-01-08 19:22:47 +11:00