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402bfb3c13
The A80 SoC has configuration registers for I/O bias voltage. Incorrect settings would make the affected peripherals inoperable in some cases, such as Ethernet RGMII signals biased at 2.5V with the settings still at 3.3V. However low speed signals such as MDIO on the same group of pins seem to be unaffected. Previously there was no way to know what the actual voltage used was, short of hard-coding a value in the device tree. With the new pin bank regulator supply support in place, the driver can now query the regulator for its voltage, and if it's valid (as opposed to being the dummy regulator), set the bias voltage setting accordingly. Add a quirk to denote the presence of the configuration registers, and a function to set the correct setting based on the voltage read back from the regulator. This is only done when the regulator is first acquired and enabled. While it would be nice to have a notifier on the regulator so that when the voltage changes, the driver can update the setting, in practice no board currently supports dynamic changing of the I/O voltages. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| pinctrl-sun4i-a10.c | ||
| pinctrl-sun5i.c | ||
| pinctrl-sun6i-a31-r.c | ||
| pinctrl-sun6i-a31.c | ||
| pinctrl-sun8i-a23-r.c | ||
| pinctrl-sun8i-a23.c | ||
| pinctrl-sun8i-a33.c | ||
| pinctrl-sun8i-a83t-r.c | ||
| pinctrl-sun8i-a83t.c | ||
| pinctrl-sun8i-h3-r.c | ||
| pinctrl-sun8i-h3.c | ||
| pinctrl-sun8i-v3s.c | ||
| pinctrl-sun9i-a80-r.c | ||
| pinctrl-sun9i-a80.c | ||
| pinctrl-sun50i-a64-r.c | ||
| pinctrl-sun50i-a64.c | ||
| pinctrl-sun50i-h5.c | ||
| pinctrl-sun50i-h6-r.c | ||
| pinctrl-sun50i-h6.c | ||
| pinctrl-suniv-f1c100s.c | ||
| pinctrl-sunxi.c | ||
| pinctrl-sunxi.h | ||