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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b91c26c6a5
During soft reset (e.g., "reboot" from Linux) on some iProc-based SOCs, the LCPLL clock and PERST both go off simultaneously. This seems in accordance with the PCIe Card Electromechanical spec, r2.0, sec 2.2.3, which says the clock goes inactive after PERST# goes active, but doesn't specify how long the clock should be valid after PERST#. However, we have observed that with the iProc Stingray, some Intel NVMe endpoints, e.g., the P3700 400GB series, are not detected correctly upon the next boot sequence unless the clock remains valid for some time after PERST# is asserted. Delay 500ms after asserting PERST# before performing a reboot. The 500ms is experimentally determined. Signed-off-by: Oza Pawandeep <oza.oza@broadcom.com> [bhelgaas: changelog, add spec reference, fold in iproc_pcie_shutdown() export from Arnd Bergmann <arnd@arndb.de>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| pci-aardvark.c | ||
| pci-ftpci100.c | ||
| pci-host-common.c | ||
| pci-host-generic.c | ||
| pci-hyperv.c | ||
| pci-mvebu.c | ||
| pci-rcar-gen2.c | ||
| pci-tegra.c | ||
| pci-thunder-ecam.c | ||
| pci-thunder-pem.c | ||
| pci-versatile.c | ||
| pci-xgene-msi.c | ||
| pci-xgene.c | ||
| pcie-altera-msi.c | ||
| pcie-altera.c | ||
| pcie-iproc-bcma.c | ||
| pcie-iproc-msi.c | ||
| pcie-iproc-platform.c | ||
| pcie-iproc.c | ||
| pcie-iproc.h | ||
| pcie-mediatek.c | ||
| pcie-rcar.c | ||
| pcie-rockchip.c | ||
| pcie-tango.c | ||
| pcie-xilinx-nwl.c | ||
| pcie-xilinx.c | ||
| vmd.c | ||