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Merge branch 'pci/host-tango' into next
* pci/host-tango: PCI: tango: Add Sigma Designs Tango SMP8759 PCIe host bridge support PCI: Add DT binding for Sigma Designs Tango PCIe controller Conflicts: drivers/pci/host/Kconfig drivers/pci/host/Makefile
This commit is contained in:
commit
6aed468480
29
Documentation/devicetree/bindings/pci/tango-pcie.txt
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29
Documentation/devicetree/bindings/pci/tango-pcie.txt
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@ -0,0 +1,29 @@
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Sigma Designs Tango PCIe controller
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Required properties:
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- compatible: "sigma,smp8759-pcie"
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- reg: address/size of PCI configuration space, address/size of register area
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- bus-range: defined by size of PCI configuration space
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- device_type: "pci"
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- #size-cells: <2>
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- #address-cells: <3>
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- msi-controller
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- ranges: translation from system to bus addresses
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- interrupts: spec for misc interrupts, spec for MSI
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Example:
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pcie@2e000 {
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compatible = "sigma,smp8759-pcie";
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reg = <0x50000000 0x400000>, <0x2e000 0x100>;
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bus-range = <0 3>;
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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msi-controller;
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ranges = <0x02000000 0x0 0x00400000 0x50400000 0x0 0x3c00000>;
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interrupts =
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<54 IRQ_TYPE_LEVEL_HIGH>, /* misc interrupts */
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<55 IRQ_TYPE_LEVEL_HIGH>; /* MSI */
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};
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@ -191,6 +191,20 @@ config PCIE_MEDIATEK
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MT7623 series SoCs. There is one single root complex with 3 root
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ports available. Each port supports Gen2 lane x1.
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config PCIE_TANGO_SMP8759
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bool "Tango SMP8759 PCIe controller (DANGEROUS)"
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depends on ARCH_TANGO && PCI_MSI && OF
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depends on BROKEN
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select PCI_HOST_COMMON
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help
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Say Y here to enable PCIe controller support for Sigma Designs
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Tango SMP8759-based systems.
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Note: The SMP8759 controller multiplexes PCI config and MMIO
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accesses, and Linux doesn't provide a way to serialize them.
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This can lead to data corruption if drivers perform concurrent
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config and MMIO accesses.
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config VMD
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depends on PCI_MSI && X86_64 && SRCU
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tristate "Intel Volume Management Device Driver"
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@ -19,6 +19,7 @@ obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o
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obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o
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obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o
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obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o
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obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o
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obj-$(CONFIG_VMD) += vmd.o
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# The following drivers are for devices that use the generic ACPI
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141
drivers/pci/host/pcie-tango.c
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141
drivers/pci/host/pcie-tango.c
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@ -0,0 +1,141 @@
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#include <linux/pci-ecam.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#define SMP8759_MUX 0x48
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#define SMP8759_TEST_OUT 0x74
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struct tango_pcie {
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void __iomem *base;
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};
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static int smp8759_config_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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struct pci_config_window *cfg = bus->sysdata;
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struct tango_pcie *pcie = dev_get_drvdata(cfg->parent);
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int ret;
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/* Reads in configuration space outside devfn 0 return garbage */
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if (devfn != 0)
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return PCIBIOS_FUNC_NOT_SUPPORTED;
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/*
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* PCI config and MMIO accesses are muxed. Linux doesn't have a
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* mutual exclusion mechanism for config vs. MMIO accesses, so
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* concurrent accesses may cause corruption.
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*/
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writel_relaxed(1, pcie->base + SMP8759_MUX);
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ret = pci_generic_config_read(bus, devfn, where, size, val);
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writel_relaxed(0, pcie->base + SMP8759_MUX);
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return ret;
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}
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static int smp8759_config_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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struct pci_config_window *cfg = bus->sysdata;
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struct tango_pcie *pcie = dev_get_drvdata(cfg->parent);
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int ret;
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writel_relaxed(1, pcie->base + SMP8759_MUX);
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ret = pci_generic_config_write(bus, devfn, where, size, val);
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writel_relaxed(0, pcie->base + SMP8759_MUX);
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return ret;
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}
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static struct pci_ecam_ops smp8759_ecam_ops = {
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.bus_shift = 20,
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.pci_ops = {
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.map_bus = pci_ecam_map_bus,
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.read = smp8759_config_read,
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.write = smp8759_config_write,
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}
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};
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static int tango_pcie_link_up(struct tango_pcie *pcie)
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{
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void __iomem *test_out = pcie->base + SMP8759_TEST_OUT;
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int i;
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writel_relaxed(16, test_out);
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for (i = 0; i < 10; ++i) {
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u32 ltssm_state = readl_relaxed(test_out) >> 8;
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if ((ltssm_state & 0x1f) == 0xf) /* L0 */
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return 1;
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usleep_range(3000, 4000);
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}
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return 0;
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}
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static int tango_pcie_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct tango_pcie *pcie;
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struct resource *res;
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int ret;
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dev_warn(dev, "simultaneous PCI config and MMIO accesses may cause data corruption\n");
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add_taint(TAINT_CRAP, LOCKDEP_STILL_OK);
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pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
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if (!pcie)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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pcie->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(pcie->base))
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return PTR_ERR(pcie->base);
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platform_set_drvdata(pdev, pcie);
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if (!tango_pcie_link_up(pcie))
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return -ENODEV;
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return pci_host_common_probe(pdev, &smp8759_ecam_ops);
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}
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static const struct of_device_id tango_pcie_ids[] = {
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{ .compatible = "sigma,smp8759-pcie" },
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{ },
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};
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static struct platform_driver tango_pcie_driver = {
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.probe = tango_pcie_probe,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = tango_pcie_ids,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver(tango_pcie_driver);
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/*
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* The root complex advertises the wrong device class.
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* Header Type 1 is for PCI-to-PCI bridges.
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*/
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static void tango_fixup_class(struct pci_dev *dev)
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{
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dev->class = PCI_CLASS_BRIDGE_PCI << 8;
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIGMA, 0x0024, tango_fixup_class);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIGMA, 0x0028, tango_fixup_class);
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/*
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* The root complex exposes a "fake" BAR, which is used to filter
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* bus-to-system accesses. Only accesses within the range defined by this
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* BAR are forwarded to the host, others are ignored.
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*
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* By default, the DMA framework expects an identity mapping, and DRAM0 is
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* mapped at 0x80000000.
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*/
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static void tango_fixup_bar(struct pci_dev *dev)
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{
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dev->non_compliant_bars = true;
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pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x80000000);
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIGMA, 0x0024, tango_fixup_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIGMA, 0x0028, tango_fixup_bar);
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@ -1373,6 +1373,8 @@
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#define PCI_DEVICE_ID_TTI_HPT374 0x0008
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#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 /* apparently a 372N variant? */
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#define PCI_VENDOR_ID_SIGMA 0x1105
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#define PCI_VENDOR_ID_VIA 0x1106
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#define PCI_DEVICE_ID_VIA_8763_0 0x0198
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#define PCI_DEVICE_ID_VIA_8380_0 0x0204
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