AuxXxilium/linux_dsm_epyc7002
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b5e8e954eb
linux_dsm_epyc7002/drivers/gpu/drm/i915/gt
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Chris Wilson b5e8e954eb drm/i915/gt: Introduce barrier pulses along engines 
To flush idle barriers, and even inflight requests, we want to send a
preemptive 'pulse' along an engine. We use a no-op request along the
pinned kernel_context at high priority so that it should run or else
kick off the stuck requests. We can use this to ensure idle barriers are
immediately flushed, as part of a context cancellation mechanism, or as
part of a heartbeat mechanism to detect and reset a stuck GPU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191021174339.5389-1-chris@chris-wilson.co.uk
2019-10-21 21:01:52 +01:00
..
selftests drm/i915: Coordinate i915_active with its own mutex 2019-10-04 15:39:12 +01:00
uc drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
gen6_renderstate.c
gen7_renderstate.c
gen8_renderstate.c
gen9_renderstate.c
intel_breadcrumbs.c drm/i915: Don't disable interrupts for intel_engine_breadcrumbs_irq() 2019-09-26 18:44:35 +01:00
intel_context_types.h drm/i915: Remove logical HW ID 2019-10-04 15:39:30 +01:00
intel_context.c drm/i915/gt: Prefer local path to runtime powermanagement 2019-10-07 21:44:02 +01:00
intel_context.h drm/i915/gt: Mark context->active_count as protected by timeline->mutex 2019-08-16 18:02:06 +01:00
intel_engine_cs.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
intel_engine_heartbeat.c drm/i915/gt: Introduce barrier pulses along engines 2019-10-21 21:01:52 +01:00
intel_engine_heartbeat.h drm/i915/gt: Introduce barrier pulses along engines 2019-10-21 21:01:52 +01:00
intel_engine_pm.c drm/i915/gt: Introduce barrier pulses along engines 2019-10-21 21:01:52 +01:00
intel_engine_pm.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
intel_engine_pool_types.h drm/i915: Replace struct_mutex for batch pool serialisation 2019-08-04 14:31:18 +01:00
intel_engine_pool.c drm/i915: Coordinate i915_active with its own mutex 2019-10-04 15:39:12 +01:00
intel_engine_pool.h drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_engine_types.h drm/i915: Make for_each_engine_masked work on intel_gt 2019-10-18 00:06:25 +01:00
intel_engine_user.c drm/i915: Make for_each_engine_masked work on intel_gt 2019-10-18 00:06:25 +01:00
intel_engine_user.h drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
intel_engine.h drm/i915/gt: execlists->active is serialised by the tasklet 2019-10-09 19:54:46 +01:00
intel_gpu_commands.h drm/i915/tgl: Add HDC Pipeline Flush 2019-10-15 18:15:59 +01:00
intel_gt_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_irq.h drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.h drm/i915: Extract GT powermanagement interrupt handling 2019-08-12 15:36:06 +01:00
intel_gt_pm.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
intel_gt_pm.h drm/i915/selftests: Distinguish mock device from no wakeref 2019-09-27 23:25:30 +01:00
intel_gt_requests.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
intel_gt_requests.h drm/i915: Move request runtime management onto gt 2019-10-04 15:39:26 +01:00
intel_gt_types.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
intel_gt.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
intel_gt.h drm/i915: Move GT init to intel_gt.c 2019-09-11 08:11:51 +01:00
intel_hangcheck.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
intel_llc_types.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
intel_llc.c drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
intel_llc.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
intel_lrc_reg.h drm/i915/selftests: Verify the LRC register layout between init and HW 2019-09-24 17:27:19 +01:00
intel_lrc.c drm/i915/execlists: Don't merely skip submission if maybe timeslicing 2019-10-18 11:23:26 +01:00
intel_lrc.h drm/i915: Remove logical HW ID 2019-10-04 15:39:30 +01:00
intel_mocs.c drm/i915: Do initial mocs configuration directly 2019-10-16 19:35:37 +01:00
intel_mocs.h drm/i915: Do initial mocs configuration directly 2019-10-16 19:35:37 +01:00
intel_rc6_types.h drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_rc6.c drm/i915/gt: Convert the leftover for_each_engine(gt) 2019-10-18 14:53:48 +01:00
intel_rc6.h drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_renderstate.c drm/i915: Serialize against vma moves 2019-08-19 15:25:56 +01:00
intel_renderstate.h
intel_reset_types.h drm/i915: Define explicit wedged on init reset state 2019-09-26 18:44:35 +01:00
intel_reset.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
intel_reset.h drm/i915: Pass intel_gt to has-reset? 2019-09-27 23:25:14 +01:00
intel_ringbuffer.c drm/i915/gt: Convert the leftover for_each_engine(gt) 2019-10-18 14:53:48 +01:00
intel_sseu.c drm/i915: Expand subslice mask 2019-08-23 19:14:27 +01:00
intel_sseu.h drm/i915/tgl: s/ss/eu fuse reading support 2019-09-21 08:31:08 +01:00
intel_timeline_types.h drm/i915: Coordinate i915_active with its own mutex 2019-10-04 15:39:12 +01:00
intel_timeline.c drm/i915: Coordinate i915_active with its own mutex 2019-10-04 15:39:12 +01:00
intel_timeline.h drm/i915/gt: Track timeline activeness in enter/exit 2019-08-15 23:16:05 +01:00
intel_workarounds_types.h
intel_workarounds.c drm/i915/tgl: Wa_1607030317, Wa_1607186500, Wa_1607297627 2019-10-15 18:25:45 +01:00
intel_workarounds.h
Makefile drm/i915: use upstream version of header tests 2019-07-30 12:11:57 +03:00
mock_engine.c drm/i915/selftests: Add the mock engine to the gt->engine[] 2019-10-18 14:53:48 +01:00
mock_engine.h
selftest_context.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
selftest_engine_cs.c drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
selftest_engine_heartbeat.c drm/i915/gt: Introduce barrier pulses along engines 2019-10-21 21:01:52 +01:00
selftest_engine_pm.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
selftest_engine.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_engine.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_gt_pm.c drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
selftest_hangcheck.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
selftest_llc.c drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
selftest_llc.h drm/i915: Extract GT ring management 2019-10-20 20:45:18 +01:00
selftest_lrc.c drm/i915/execlists: Don't merely skip submission if maybe timeslicing 2019-10-18 11:23:26 +01:00
selftest_reset.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
selftest_timeline.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00
selftest_workarounds.c drm/i915: Pass in intel_gt at some for_each_engine sites 2019-10-18 00:06:27 +01:00