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11f489d3c6
In Gen9 platform Interlaced fetch mode doesn't support following plane configuration: - Y/Yf tiling - 90/270 rotation - YUV420 hybrid planar source pixel formats. This patch adds check to fail the flip if any of the above configuration is requested. Changes since V1: - handle checks in intel_plane_atomic_check_with_state (ville) - takeout plane scaler checks combile with pipe scaler in next patch Changes since V2: - No need to check for NV12 as it need scaling, so it will be rejected by scaling check (ville) Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170630121100.20159-2-mahesh1.kumar@intel.com Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90238 Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
297 lines
8.8 KiB
C
297 lines
8.8 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* DOC: atomic plane helpers
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*
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* The functions here are used by the atomic plane helper functions to
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* implement legacy plane updates (i.e., drm_plane->update_plane() and
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* drm_plane->disable_plane()). This allows plane updates to use the
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* atomic state infrastructure and perform plane updates as separate
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* prepare/check/commit/cleanup steps.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_plane_helper.h>
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#include "intel_drv.h"
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/**
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* intel_create_plane_state - create plane state object
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* @plane: drm plane
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*
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* Allocates a fresh plane state for the given plane and sets some of
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* the state values to sensible initial values.
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*
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* Returns: A newly allocated plane state, or NULL on failure
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*/
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struct intel_plane_state *
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intel_create_plane_state(struct drm_plane *plane)
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{
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struct intel_plane_state *state;
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (!state)
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return NULL;
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state->base.plane = plane;
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state->base.rotation = DRM_MODE_ROTATE_0;
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state->ckey.flags = I915_SET_COLORKEY_NONE;
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return state;
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}
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/**
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* intel_plane_duplicate_state - duplicate plane state
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* @plane: drm plane
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*
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* Allocates and returns a copy of the plane state (both common and
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* Intel-specific) for the specified plane.
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*
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* Returns: The newly allocated plane state, or NULL on failure.
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*/
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struct drm_plane_state *
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intel_plane_duplicate_state(struct drm_plane *plane)
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{
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struct drm_plane_state *state;
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struct intel_plane_state *intel_state;
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intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
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if (!intel_state)
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return NULL;
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state = &intel_state->base;
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__drm_atomic_helper_plane_duplicate_state(plane, state);
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intel_state->vma = NULL;
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return state;
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}
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/**
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* intel_plane_destroy_state - destroy plane state
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* @plane: drm plane
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* @state: state object to destroy
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*
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* Destroys the plane state (both common and Intel-specific) for the
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* specified plane.
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*/
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void
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intel_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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WARN_ON(to_intel_plane_state(state)->vma);
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drm_atomic_helper_plane_destroy_state(plane, state);
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}
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int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
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struct intel_plane_state *intel_state)
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{
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struct drm_plane *plane = intel_state->base.plane;
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struct drm_i915_private *dev_priv = to_i915(plane->dev);
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struct drm_plane_state *state = &intel_state->base;
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struct intel_plane *intel_plane = to_intel_plane(plane);
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->base.adjusted_mode;
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int ret;
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/*
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* Both crtc and plane->crtc could be NULL if we're updating a
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* property while the plane is disabled. We don't actually have
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* anything driver-specific we need to test in that case, so
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* just return success.
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*/
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if (!intel_state->base.crtc && !plane->state->crtc)
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return 0;
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/* Clip all planes to CRTC size, or 0x0 if CRTC is disabled */
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intel_state->clip.x1 = 0;
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intel_state->clip.y1 = 0;
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intel_state->clip.x2 =
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crtc_state->base.enable ? crtc_state->pipe_src_w : 0;
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intel_state->clip.y2 =
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crtc_state->base.enable ? crtc_state->pipe_src_h : 0;
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if (state->fb && drm_rotation_90_or_270(state->rotation)) {
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struct drm_format_name_buf format_name;
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if (state->fb->modifier != I915_FORMAT_MOD_Y_TILED &&
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state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) {
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DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n");
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return -EINVAL;
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}
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/*
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* 90/270 is not allowed with RGB64 16:16:16:16,
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* RGB 16-bit 5:6:5, and Indexed 8-bit.
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* TBD: Add RGB64 case once its added in supported format list.
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*/
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switch (state->fb->format->format) {
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case DRM_FORMAT_C8:
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case DRM_FORMAT_RGB565:
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DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",
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drm_get_format_name(state->fb->format->format,
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&format_name));
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return -EINVAL;
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default:
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break;
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}
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}
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/* CHV ignores the mirror bit when the rotate bit is set :( */
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if (IS_CHERRYVIEW(dev_priv) &&
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state->rotation & DRM_MODE_ROTATE_180 &&
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state->rotation & DRM_MODE_REFLECT_X) {
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DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n");
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return -EINVAL;
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}
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intel_state->base.visible = false;
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ret = intel_plane->check_plane(intel_plane, crtc_state, intel_state);
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if (ret)
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return ret;
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/*
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* Y-tiling is not supported in IF-ID Interlace mode in
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* GEN9 and above.
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*/
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if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
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adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
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if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
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state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
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DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
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return -EINVAL;
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}
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}
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/* FIXME pre-g4x don't work like this */
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if (intel_state->base.visible)
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crtc_state->active_planes |= BIT(intel_plane->id);
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else
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crtc_state->active_planes &= ~BIT(intel_plane->id);
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return intel_plane_atomic_calc_changes(&crtc_state->base, state);
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}
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static int intel_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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struct drm_crtc *crtc = state->crtc;
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struct drm_crtc_state *drm_crtc_state;
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crtc = crtc ? crtc : plane->state->crtc;
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/*
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* Both crtc and plane->crtc could be NULL if we're updating a
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* property while the plane is disabled. We don't actually have
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* anything driver-specific we need to test in that case, so
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* just return success.
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*/
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if (!crtc)
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return 0;
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drm_crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc);
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if (WARN_ON(!drm_crtc_state))
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return -EINVAL;
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return intel_plane_atomic_check_with_state(to_intel_crtc_state(drm_crtc_state),
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to_intel_plane_state(state));
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}
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static void intel_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct intel_plane *intel_plane = to_intel_plane(plane);
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struct intel_plane_state *intel_state =
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to_intel_plane_state(plane->state);
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struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc;
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if (intel_state->base.visible) {
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trace_intel_update_plane(plane,
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to_intel_crtc(crtc));
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intel_plane->update_plane(intel_plane,
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to_intel_crtc_state(crtc->state),
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intel_state);
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} else {
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trace_intel_disable_plane(plane,
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to_intel_crtc(crtc));
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intel_plane->disable_plane(intel_plane, to_intel_crtc(crtc));
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}
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}
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const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
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.prepare_fb = intel_prepare_plane_fb,
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.cleanup_fb = intel_cleanup_plane_fb,
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.atomic_check = intel_plane_atomic_check,
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.atomic_update = intel_plane_atomic_update,
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};
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/**
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* intel_plane_atomic_get_property - fetch plane property value
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* @plane: plane to fetch property for
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* @state: state containing the property value
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* @property: property to look up
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* @val: pointer to write property value into
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*
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* The DRM core does not store shadow copies of properties for
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* atomic-capable drivers. This entrypoint is used to fetch
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* the current value of a driver-specific plane property.
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*/
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int
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intel_plane_atomic_get_property(struct drm_plane *plane,
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const struct drm_plane_state *state,
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struct drm_property *property,
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uint64_t *val)
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{
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DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name);
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return -EINVAL;
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}
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/**
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* intel_plane_atomic_set_property - set plane property value
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* @plane: plane to set property for
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* @state: state to update property value in
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* @property: property to set
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* @val: value to set property to
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*
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* Writes the specified property value for a plane into the provided atomic
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* state object.
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*
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* Returns 0 on success, -EINVAL on unrecognized properties
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*/
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int
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intel_plane_atomic_set_property(struct drm_plane *plane,
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struct drm_plane_state *state,
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struct drm_property *property,
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uint64_t val)
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{
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DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name);
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return -EINVAL;
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}
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