linux_dsm_epyc7002/drivers/gpu
Rodrigo Vivi acfb5554c7 drm/i915/cnl: WaForceContextSaveRestoreNonCoherent
To avoid a potential hang condition with TLB invalidation
we need to enable masked bit 5 of MMIO 0xE5F0 at boot.

Same workaround was in place for previous platforms,
but the register offset has changed for CNL.
But also BSpec doesn't mention the bit 15 as set on gen9
platforms and mark bit as reserved on CNL.

v2: Improve commit message accepting Oscar's suggestion.

Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Oscar Mateo <oscar.mateo@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170823203504.10012-1-rodrigo.vivi@intel.com
2017-08-23 14:35:11 -07:00
..
drm drm/i915/cnl: WaForceContextSaveRestoreNonCoherent 2017-08-23 14:35:11 -07:00
host1x gpu/host1x: Remove excess parameter in host1x_subdev_add docs 2017-07-31 14:24:37 +02:00
ipu-v3 drm: Convert to using %pOF instead of full_name 2017-07-26 13:45:06 +02:00
vga sched/wait: Rename wait_queue_t => wait_queue_entry_t 2017-06-20 12:18:27 +02:00
Makefile