Vinod Koul a76f274182 clk: qcom: gcc: Fix parent for gpll0_out_even ... Documentation says that gpll0 is parent of gpll0_out_even, somehow driver coded that as bi_tcxo, so fix it Fixes: 2a1d7eb854 ("clk: qcom: gcc: Add global clock controller driver for SM8150") Reported-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lkml.kernel.org/r/20200521052728.2141377-1-vkoul@kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2020-05-26 17:15:06 -07:00
..
actions	Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and 'clk-actions' into clk-next	2019-09-19 15:31:46 -07:00
analogbits
at91	There's not much to see in the core framework this time around. Instead the	2020-04-05 10:43:32 -07:00
axis
axs10x	clk: axs10x: use devm_platform_ioremap_resource() to simplify code	2019-10-16 16:17:50 -07:00
bcm	clk: bcm2835: use devm_platform_ioremap_resource() to simplify code	2019-10-16 16:16:50 -07:00
berlin
davinci	clk: davinci: use devm_platform_ioremap_resource() to simplify code	2019-10-16 16:17:14 -07:00
h8300
hisilicon	Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next	2019-11-27 08:14:17 -08:00
imgtec	drivers/clk: convert VL struct to struct_size	2019-11-08 08:36:12 -08:00
imx	There's not much to see in the core framework this time around. Instead the	2020-04-05 10:43:32 -07:00
ingenic	clk: ingenic/TCU: Fix round_rate returning error	2020-03-20 17:08:40 -07:00
keystone	clk: keystone: Add new driver to handle syscon based clocks	2020-03-20 17:07:21 -07:00
loongson1
mediatek	clk: Fix Kconfig indentation	2020-01-04 23:34:39 -08:00
meson	clk: meson: meson8b: set audio output clock hierarchy	2020-02-21 11:44:41 +01:00
microchip	clk: let init callback return an error code	2019-12-23 18:53:13 -08:00
mmp	clk: mmp2: fix link error without mmp2	2020-04-13 12:20:06 -07:00
mvebu	clk: Fix Kconfig indentation	2020-01-04 23:34:39 -08:00
mxs
nxp
pistachio
pxa	clk: pxa: fix one of the pxa RTC clocks	2019-11-13 15:01:17 -08:00
qcom	clk: qcom: gcc: Fix parent for gpll0_out_even	2020-05-26 17:15:06 -07:00
renesas	clk: renesas: rcar-usb2-clock-sel: Add reset_control	2020-03-09 09:29:58 +01:00
rockchip	clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks	2020-04-13 09:35:24 +02:00
samsung	clk: samsung: Remove redundant check in samsung_cmu_register_one	2020-02-12 15:38:44 -08:00
sifive
sirf
socfpga	clk: socfpga: stratix10: simplify parameter passing	2020-02-12 15:42:04 -08:00
spear
sprd	clk: sprd: don't gate uart console clock	2020-04-13 12:20:07 -07:00
st	Merge branches 'clk-aspeed', 'clk-unused', 'clk-of-node-put', 'clk-const-bulk-data' and 'clk-debugfs' into clk-next	2019-09-19 15:30:40 -07:00
sunxi	clk: sunxi: use of_device_get_match_data	2019-12-09 08:49:02 +01:00
sunxi-ng	clk: sunxi-ng: sun8i-de2: Sort structures	2020-02-12 19:01:16 +01:00
tegra	clk: tegra: Fix initial rate for pll_a on Tegra124	2020-05-12 16:26:18 -07:00
ti	clk: ti: clkctrl: convert subclocks to use proper names also	2020-05-12 20:18:19 -07:00
uniphier	clk: uniphier: Add SCSSI clock gate for each channel	2020-01-04 23:14:22 -08:00
ux500	clk: ux500: Fix up the SGA clock for some variants	2020-01-04 23:27:15 -08:00
versatile	clk: impd1: Look up clock-output-names	2020-05-05 12:13:12 -07:00
x86
zte
zynq
zynqmp	clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag	2020-01-23 13:25:37 -08:00
clk-asm9260.c	clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo	2020-04-13 12:20:06 -07:00
clk-aspeed.c	clk: aspeed: Add RMII RCLK gates for both AST2500 MACs	2019-11-26 10:02:48 -08:00
clk-aspeed.h
clk-ast2600.c	This merge window we have one small clk provider API in the core framework and	2019-12-01 16:06:02 -08:00
clk-axi-clkgen.c
clk-axm5516.c
clk-bd718x7.c	clk: bd718x7: Support ROHM BD71828 clk block	2020-01-24 07:22:47 +00:00
clk-bm1880.c	clk: bm1800: Remove set but not used variable 'fref'	2019-12-24 00:10:33 -08:00
clk-bulk.c	clk: Make clk_bulk_get_all() return a valid "id"	2019-09-17 13:26:31 -07:00
clk-cdce706.c
clk-cdce925.c
clk-clps711x.c
clk-composite.c	clk: composite: add _register_composite_pdata() variants	2020-01-28 13:26:48 -08:00
clk-conf.c
clk-cs2000-cp.c
clk-devres.c
clk-divider.c	clk: divider: Add support for specifying parents via DT/pointers	2020-01-07 23:08:02 -08:00
clk-efm32gg.c
clk-fixed-factor.c
clk-fixed-mmio.c
clk-fixed-rate.c	clk: fixed-rate: Add clk flags for parent accuracy	2020-01-06 23:07:34 -08:00
clk-fractional-divider.c
clk-fsl-sai.c	clk: fsl-sai: new driver	2020-01-28 13:26:48 -08:00
clk-gate.c	clk: gate: Add support for specifying parents via DT/pointers	2020-01-06 23:10:12 -08:00
clk-gemini.c
clk-gpio.c	clk: gpio: Use DT way of specifying parents	2020-01-05 13:34:36 -08:00
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c
clk-lochnagar.c
clk-max9485.c
clk-max77686.c
clk-milbeaut.c
clk-moxart.c
clk-multiplier.c
clk-mux.c	clk: mux: Add support for specifying parents via DT/pointers	2020-01-06 23:10:05 -08:00
clk-nomadik.c
clk-npcm7xx.c
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-plldig.c	clk: ls1028a: fix a dereference of pointer 'parent' before a null check	2020-02-03 23:03:49 -08:00
clk-pwm.c
clk-qoriq.c	clk: qoriq: add ls1088a hwaccel clocks support	2020-01-30 16:32:13 -08:00
clk-rk808.c
clk-s2mps11.c
clk-scmi.c	clk: scmi: Match scmi device by both name and protocol id	2019-12-24 11:36:46 +00:00
clk-scpi.c
clk-si514.c
clk-si544.c
clk-si570.c
clk-si5341.c	clk, clk-si5341: Support multiple input ports	2020-01-28 13:05:54 -08:00
clk-si5351.c
clk-si5351.h
clk-stm32f4.c
clk-stm32h7.c
clk-stm32mp1.c
clk-tango4.c
clk-twl6040.c
clk-u300.c
clk-versaclock5.c
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c	clk: Unlink clock if failed to prepare or enable	2020-05-05 12:12:00 -07:00
clk.h
clkdev.c
Kconfig	There are a few changes to the core framework this time around, in addition to	2020-02-03 22:10:18 +00:00
Makefile	Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', 'clk-freescale' and 'clk-qoriq' into clk-next	2020-01-31 13:14:26 -08:00