mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 23:37:50 +07:00
107e6aad98
Add initial device tree nodes for EXYNOS5410 SoC and SMDK5410 board. Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com> Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
83 lines
1.4 KiB
Plaintext
83 lines
1.4 KiB
Plaintext
/*
|
|
* SAMSUNG SMDK5410 board device tree source
|
|
*
|
|
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
|
|
* http://www.samsung.com
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "exynos5410.dtsi"
|
|
/ {
|
|
model = "Samsung SMDK5410 board based on EXYNOS5410";
|
|
compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
|
|
|
|
memory {
|
|
reg = <0x40000000 0x80000000>;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttySAC2,115200";
|
|
};
|
|
|
|
fin_pll: xxti {
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <24000000>;
|
|
clock-output-names = "fin_pll";
|
|
#clock-cells = <0>;
|
|
};
|
|
|
|
firmware@02037000 {
|
|
compatible = "samsung,secure-firmware";
|
|
reg = <0x02037000 0x1000>;
|
|
};
|
|
|
|
};
|
|
|
|
&mmc_0 {
|
|
status = "okay";
|
|
num-slots = <1>;
|
|
supports-highspeed;
|
|
broken-cd;
|
|
card-detect-delay = <200>;
|
|
samsung,dw-mshc-ciu-div = <3>;
|
|
samsung,dw-mshc-sdr-timing = <2 3>;
|
|
samsung,dw-mshc-ddr-timing = <1 2>;
|
|
|
|
slot@0 {
|
|
reg = <0>;
|
|
bus-width = <8>;
|
|
};
|
|
};
|
|
|
|
&mmc_2 {
|
|
status = "okay";
|
|
num-slots = <1>;
|
|
supports-highspeed;
|
|
card-detect-delay = <200>;
|
|
samsung,dw-mshc-ciu-div = <3>;
|
|
samsung,dw-mshc-sdr-timing = <2 3>;
|
|
samsung,dw-mshc-ddr-timing = <1 2>;
|
|
|
|
slot@0 {
|
|
reg = <0>;
|
|
bus-width = <4>;
|
|
disable-wp;
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
status = "okay";
|
|
};
|