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8ed536b1e2
This patch adds the support for setting up a SG table for use
by the CATU. We reuse the tmc_sg_table to represent the table/data
pages, even though the table format is different.
Similar to ETR SG table, CATU uses a 4KB page size for data buffers
as well as page tables. All table entries are 64bit wide and have
the following format:
63 12 1 0
x-----------------------------------x
| Address [63-12] | SBZ | V |
x-----------------------------------x
Where [V] -> 0 - Pointer is invalid
1 - Pointer is Valid
CATU uses only first half of the page for data page pointers.
i.e, single table page will only have 256 page pointers, addressing
upto 1MB of data. The second half of a table page contains only two
pointers at the end of the page (i.e, pointers at index 510 and 511),
which are used as links to the "Previous" and "Next" page tables
respectively.
The first table page has an "Invalid" previous pointer and the
next pointer entry points to the second page table if there is one.
Similarly the last table page has an "Invalid" next pointer to
indicate the end of the table chain.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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|---|---|---|
| .. | ||
| coresight-catu.c | ||
| coresight-catu.h | ||
| coresight-cpu-debug.c | ||
| coresight-dynamic-replicator.c | ||
| coresight-etb10.c | ||
| coresight-etm3x-sysfs.c | ||
| coresight-etm3x.c | ||
| coresight-etm4x-sysfs.c | ||
| coresight-etm4x.c | ||
| coresight-etm4x.h | ||
| coresight-etm-cp14.c | ||
| coresight-etm-perf.c | ||
| coresight-etm-perf.h | ||
| coresight-etm.h | ||
| coresight-funnel.c | ||
| coresight-priv.h | ||
| coresight-replicator.c | ||
| coresight-stm.c | ||
| coresight-tmc-etf.c | ||
| coresight-tmc-etr.c | ||
| coresight-tmc.c | ||
| coresight-tmc.h | ||
| coresight-tpiu.c | ||
| coresight.c | ||
| Kconfig | ||
| Makefile | ||
| of_coresight.c | ||