Hawking Zhang 718715e6a4 drm/amdgpu: add firmware_info v3_4 structure for Sienna_Cichlid ... firmware_info v3_4 strucure will be used by kernel driver to query various parameters set by VBIOS for Sienna_Cichlid Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-07-01 01:59:10 -04:00
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asic_reg	drm/amd/display: Add dcn30 Headers (v2)	2020-06-03 13:51:56 -04:00
ivsrcid	drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2)	2020-06-03 13:52:03 -04:00
amd_acpi.h	drm/amd: Query and use ACPI backlight caps	2018-11-26 15:54:39 -05:00
amd_pcie_helpers.h
amd_pcie.h	drm/amdgpu: update amd_pcie.h to include gen4 speeds	2018-07-05 16:39:59 -05:00
amd_shared.h	drm/amdgpu: add apu flags (v2)	2020-05-22 13:41:53 -04:00
arct_ip_offset.h	drm/amd/include: adjust base offset of SMUIO and THM for Arcturus	2019-07-30 23:48:34 -05:00
atom-bits.h
atom-names.h
atom-types.h
atombios.h	drm/amd: fix typo	2019-01-25 16:15:34 -05:00
atomfirmware.h	drm/amdgpu: add firmware_info v3_4 structure for Sienna_Cichlid	2020-07-01 01:59:10 -04:00
atomfirmwareid.h
cgs_common.h	drm/amdgpu: retire indirect mmio reg support from cgs	2020-04-09 10:43:18 -04:00
cik_structs.h	drm/amdkfd: Shift sdma_engine_id and sdma_queue_id in mqd	2019-05-24 12:21:01 -05:00
discovery.h	drm/amdgpu/discovery: reserve discovery data at the top of VRAM	2019-10-15 15:48:46 -04:00
displayobject.h
dm_pp_interface.h	drm/amd/pp: Remove the same struct define in powerplay	2018-07-05 16:40:02 -05:00
kgd_kfd_interface.h	drm/amdkfd: Consolidate duplicated bo alloc flags	2020-03-10 15:54:34 -04:00
kgd_pp_interface.h	drm/amd/powerplay: support xgmi pstate setting on powerplay routine V2	2019-11-06 16:27:46 -05:00
navi10_enum.h	drm/amdgpu: add navi10 enums header	2019-06-20 15:54:46 -05:00
navi10_ip_offset.h	drm/amdgpu: add navi10 ip offset header	2019-06-20 15:54:53 -05:00
navi12_ip_offset.h	drm/amdgpu: Fix a typo in the include header guard of 'navi12_ip_offset.h'	2019-08-21 22:16:55 -05:00
navi14_ip_offset.h	drm/amdgpu/soc15: initialize reg base for navi14 (v2)	2019-07-18 14:17:58 -05:00
pptable.h
renoir_ip_offset.h	drm/amd/display: Add DCN_BASE regs	2019-10-17 16:27:27 -04:00
sienna_cichlid_ip_offset.h	drm/amdgpu: initialize IP offset for sienna_cichlid (v2)	2020-06-03 13:52:00 -04:00
soc15_hw_ip.h	drm/amdgpu: add navi10 ip offset header	2019-06-20 15:54:53 -05:00
soc15_ih_clientid.h	drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid	2020-06-03 13:52:04 -04:00
v9_structs.h	drm/amdkfd: Extend CU mask to 8 SEs (v3)	2019-08-02 10:19:11 -05:00
v10_structs.h	drm/amdgpu: add v10 structs header (v2)	2019-06-20 21:16:37 -05:00
vega10_enum.h	drm/amdgpu: Support new arcturus mtype	2019-09-13 17:35:48 -05:00
vega10_ip_offset.h	drm/amdgpu: remove trailing whitespace from soc15ip.h	2018-03-14 16:01:18 -05:00
vega20_ip_offset.h	drm/amd/include/vg20: adjust VCE_BASE to reuse vce 4.0 header files	2018-05-17 10:13:09 -05:00
vi_structs.h	drm/amdkfd: Shift sdma_engine_id and sdma_queue_id in mqd	2019-05-24 12:21:01 -05:00