drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2019-08-23 14:35:45 +08:00 committed by Alex Deucher
parent 157e72e831
commit d682a353f3
2 changed files with 3 additions and 2 deletions

View File

@ -1166,7 +1166,7 @@ static int sdma_v5_2_sw_init(void *handle)
return r;
/* SDMA trap event */
r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA3,
r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid,
SDMA3_5_0__SRCID__SDMA_TRAP,
&adev->sdma.trap_irq);
if (r)
@ -1408,7 +1408,7 @@ static int sdma_v5_2_process_trap_irq(struct amdgpu_device *adev,
break;
}
break;
case SOC15_IH_CLIENTID_SDMA3:
case SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid:
switch (entry->ring_id) {
case 0:
amdgpu_fence_process(&adev->sdma.instance[3].ring);

View File

@ -66,6 +66,7 @@ enum soc15_ih_clientid {
SOC15_IH_CLIENTID_VCN1 = SOC15_IH_CLIENTID_UVD1,
SOC15_IH_CLIENTID_SDMA2 = SOC15_IH_CLIENTID_ACP,
SOC15_IH_CLIENTID_SDMA3 = SOC15_IH_CLIENTID_DCE,
SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid = SOC15_IH_CLIENTID_ISP,
SOC15_IH_CLIENTID_SDMA4 = SOC15_IH_CLIENTID_ISP,
SOC15_IH_CLIENTID_SDMA5 = SOC15_IH_CLIENTID_VCE0,
SOC15_IH_CLIENTID_SDMA6 = SOC15_IH_CLIENTID_XDMA,