mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 05:06:55 +07:00
f079f6d999
Extend the DSI PHY/PLL drivers to support the DSI 14nm PHY/PLL found on 8x96. These are picked up from the downstream driver. The PHY part is similar to the other DSI PHYs. The PLL driver requires some trickery so that one DSI PLL can drive both the DSIs (i.e, dual DSI mode). In the case of dual DSI mode. One DSI instance becomes the clock master, and other the clock slave. The master PLL's output (Byte and Pixel clock) is fed to both the DSI hosts/PHYs. When the DSIs are configured in dual DSI mode, the PHY driver communicates to the PLL driver using msm_dsi_pll_set_usecase() which instance is the master and which one is the slave. When setting rate, the master PLL also configures some of the slave PLL/PHY registers which need to be identical to the master's for correct dual DSI behaviour. There are 2 PLL post dividers that should have ideally been modelled as generic clk_divider clocks, but require some customization for dual DSI. In particular, when the master PLL's post-diviers are set, the slave PLL's post-dividers need to be set too. The clk_ops for these use clk_divider's helper ops and flags internally to prevent redundant code. Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
82 lines
2.0 KiB
Plaintext
82 lines
2.0 KiB
Plaintext
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config DRM_MSM
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tristate "MSM DRM"
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depends on DRM
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depends on ARCH_QCOM || (ARM && COMPILE_TEST)
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depends on OF && COMMON_CLK
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depends on MMU
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select REGULATOR
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select DRM_KMS_HELPER
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select DRM_PANEL
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select SHMEM
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select TMPFS
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select QCOM_SCM
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select SND_SOC_HDMI_CODEC if SND_SOC
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select SYNC_FILE
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default y
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help
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DRM/KMS driver for MSM/snapdragon.
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config DRM_MSM_REGISTER_LOGGING
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bool "MSM DRM register logging"
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depends on DRM_MSM
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default n
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help
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Compile in support for logging register reads/writes in a format
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that can be parsed by envytools demsm tool. If enabled, register
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logging can be switched on via msm.reglog=y module param.
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config DRM_MSM_HDMI_HDCP
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bool "Enable HDMI HDCP support in MSM DRM driver"
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depends on DRM_MSM && QCOM_SCM
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default y
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help
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Choose this option to enable HDCP state machine
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config DRM_MSM_DSI
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bool "Enable DSI support in MSM DRM driver"
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depends on DRM_MSM
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select DRM_PANEL
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select DRM_MIPI_DSI
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default y
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help
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Choose this option if you have a need for MIPI DSI connector
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support.
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config DRM_MSM_DSI_PLL
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bool "Enable DSI PLL driver in MSM DRM"
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depends on DRM_MSM_DSI && COMMON_CLK
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default y
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help
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Choose this option to enable DSI PLL driver which provides DSI
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source clocks under common clock framework.
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config DRM_MSM_DSI_28NM_PHY
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bool "Enable DSI 28nm PHY driver in MSM DRM"
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depends on DRM_MSM_DSI
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default y
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help
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Choose this option if the 28nm DSI PHY is used on the platform.
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config DRM_MSM_DSI_20NM_PHY
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bool "Enable DSI 20nm PHY driver in MSM DRM"
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depends on DRM_MSM_DSI
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default y
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help
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Choose this option if the 20nm DSI PHY is used on the platform.
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config DRM_MSM_DSI_28NM_8960_PHY
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bool "Enable DSI 28nm 8960 PHY driver in MSM DRM"
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depends on DRM_MSM_DSI
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default y
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help
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Choose this option if the 28nm DSI PHY 8960 variant is used on the
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platform.
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config DRM_MSM_DSI_14NM_PHY
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bool "Enable DSI 14nm PHY driver in MSM DRM (used by MSM8996/APQ8096)"
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depends on DRM_MSM_DSI
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default y
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help
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Choose this option if DSI PHY on 8996 is used on the platform.
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