Leo (Sunpeng) Li dc37a9a08d Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86" ... This reverts commit 8624c3c4dbfe24fc6740687236a2e196f5f4bfb0. We need CONFIG_DRM_AMD_DC_DCN1_0 to guard code that is using fp math. Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-08-21 14:32:28 -05:00
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hw	drm/amd/display: Prevent PSR from being enabled if initialization fails	2018-07-27 09:07:43 -05:00
bw_fixed.h	amdgpu/dc: allow inlining constant int to fixed a lot better.	2017-09-29 13:03:35 -04:00
clock_source.h	drm/amd/display: add display write back(DWB)	2017-09-26 18:16:36 -04:00
compressor.h	drm/amd/display: Initial prototype of FBC implementation	2017-09-26 18:15:56 -04:00
core_status.h	drm/amd/display: Add timing validation against dongle cap	2017-11-28 17:54:16 -05:00
core_types.h	Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"	2018-08-21 14:32:28 -05:00
custom_float.h	drm/amd/display: Enable regamma 25 segments and use double buffer.	2017-09-26 17:14:18 -04:00
dc_link_ddc.h	drm/amd/display: Return aux replies directly to DRM	2018-07-13 14:48:36 -05:00
dc_link_dp.h	drm/amd/display: Retry link training again	2018-07-27 09:07:42 -05:00
dce_calcs.h	drm/amdgpu/display: remove VEGAM config option	2018-05-18 16:08:18 -05:00
dcn_calcs.h	drm/amd/display: replace clocks_value struct with dc_clocks	2018-07-05 16:38:27 -05:00
hw_sequencer.h	drm/amd/display: Refactor SDR cursor boosting in HDR mode	2018-07-16 16:11:49 -05:00
link_hwss.h	drm/amd/display: add eDP 1.2+ polling for T7	2018-02-19 14:19:34 -05:00
reg_helper.h	drm/amd/display: generic indirect register access	2018-07-13 14:47:33 -05:00
resource.h	drm/amd/display: Check if clock source in use before disabling	2018-08-13 17:29:11 -05:00