mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 11:55:49 +07:00
80881dae52
Tegra has 5 UARTS which could be used for low-level debug output. Commit
fe26398 "ARM: tegra: uncompress.h: Choose a UART at runtime" implemented
one method for the kernel to automatically determine which of these to
use at run-time, so that the same DEBUG_LL-enabled kernel image could be
used across multiple Tegra boards. The required bootloader-side setup for
that option is implemented in NVIDIA's various downstream U-Boot branches,
but the U-Boot maintainers have refused to accept it upstream.
This change implements an alternative automatic UART selection option
using ODMDATA. This is a 32-bit value programmed into Tegra's boot memory
which provides a few pieces of basic board-specific information, including
a field that indicates the console UART. Setting up this value is part of
the standard Tegra boot architecture, and so requires no Tegra-specific
hacks in the bootloader's UART driver.
Note that in theory, the format of ODMDATA is board-specific. However, in
practice all boards use the same location/size/values for the UART field.
ODMDATA[19:18] (which drive the type of debug console) is more problematic,
since some boards use value 2 for UART and others use 3. This patch just
accepts either value; if this doesn't work well for a given board, I'd
suggest simply not enabling this debug option when building for that board.
Note that the kernel assumes the bootloader has already set up any required
pinmux settings for the UART; there is no way the kernel can do this for
itself prior to knowing which board it's running on. In practice, people
using this feature are highly likely to be using bootloaders that have
indeed configured the pinmux. This assumption existed prior to this patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
175 lines
4.5 KiB
Plaintext
175 lines
4.5 KiB
Plaintext
if ARCH_TEGRA
|
|
|
|
comment "NVIDIA Tegra options"
|
|
|
|
config ARCH_TEGRA_2x_SOC
|
|
bool "Enable support for Tegra20 family"
|
|
select CPU_V7
|
|
select ARM_GIC
|
|
select ARCH_REQUIRE_GPIOLIB
|
|
select PINCTRL
|
|
select PINCTRL_TEGRA20
|
|
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
|
select USB_ULPI if USB
|
|
select USB_ULPI_VIEWPORT if USB_SUPPORT
|
|
select ARM_ERRATA_720789
|
|
select ARM_ERRATA_742230
|
|
select ARM_ERRATA_751472
|
|
select ARM_ERRATA_754327
|
|
select ARM_ERRATA_764369
|
|
select PL310_ERRATA_727915 if CACHE_L2X0
|
|
select PL310_ERRATA_769419 if CACHE_L2X0
|
|
select CPU_FREQ_TABLE if CPU_FREQ
|
|
help
|
|
Support for NVIDIA Tegra AP20 and T20 processors, based on the
|
|
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
|
|
|
|
config ARCH_TEGRA_3x_SOC
|
|
bool "Enable support for Tegra30 family"
|
|
select CPU_V7
|
|
select ARM_GIC
|
|
select ARCH_REQUIRE_GPIOLIB
|
|
select PINCTRL
|
|
select PINCTRL_TEGRA30
|
|
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
|
select USB_ULPI if USB
|
|
select USB_ULPI_VIEWPORT if USB_SUPPORT
|
|
select USE_OF
|
|
select ARM_ERRATA_743622
|
|
select ARM_ERRATA_751472
|
|
select ARM_ERRATA_754322
|
|
select ARM_ERRATA_764369
|
|
select PL310_ERRATA_769419 if CACHE_L2X0
|
|
select CPU_FREQ_TABLE if CPU_FREQ
|
|
help
|
|
Support for NVIDIA Tegra T30 processor family, based on the
|
|
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
|
|
|
|
config TEGRA_PCI
|
|
bool "PCI Express support"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
select PCI
|
|
|
|
comment "Tegra board type"
|
|
|
|
config MACH_HARMONY
|
|
bool "Harmony board"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
|
|
help
|
|
Support for nVidia Harmony development platform
|
|
|
|
config MACH_KAEN
|
|
bool "Kaen board"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
select MACH_SEABOARD
|
|
select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
|
|
help
|
|
Support for the Kaen version of Seaboard
|
|
|
|
config MACH_PAZ00
|
|
bool "Paz00 board"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
help
|
|
Support for the Toshiba AC100/Dynabook AZ netbook
|
|
|
|
config MACH_SEABOARD
|
|
bool "Seaboard board"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
|
|
help
|
|
Support for nVidia Seaboard development platform. It will
|
|
also be included for some of the derivative boards that
|
|
have large similarities with the seaboard design.
|
|
|
|
config MACH_TEGRA_DT
|
|
bool "Generic Tegra20 board (FDT support)"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
select USE_OF
|
|
help
|
|
Support for generic NVIDIA Tegra20 boards using Flattened Device Tree
|
|
|
|
config MACH_TRIMSLICE
|
|
bool "TrimSlice board"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
select TEGRA_PCI
|
|
help
|
|
Support for CompuLab TrimSlice platform
|
|
|
|
config MACH_WARIO
|
|
bool "Wario board"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
select MACH_SEABOARD
|
|
help
|
|
Support for the Wario version of Seaboard
|
|
|
|
config MACH_VENTANA
|
|
bool "Ventana board"
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
select MACH_TEGRA_DT
|
|
help
|
|
Support for the nVidia Ventana development platform
|
|
|
|
choice
|
|
prompt "Default low-level debug console UART"
|
|
default TEGRA_DEBUG_UART_NONE
|
|
|
|
config TEGRA_DEBUG_UART_NONE
|
|
bool "None"
|
|
|
|
config TEGRA_DEBUG_UARTA
|
|
bool "UART-A"
|
|
|
|
config TEGRA_DEBUG_UARTB
|
|
bool "UART-B"
|
|
|
|
config TEGRA_DEBUG_UARTC
|
|
bool "UART-C"
|
|
|
|
config TEGRA_DEBUG_UARTD
|
|
bool "UART-D"
|
|
|
|
config TEGRA_DEBUG_UARTE
|
|
bool "UART-E"
|
|
|
|
endchoice
|
|
|
|
choice
|
|
prompt "Automatic low-level debug console UART"
|
|
default TEGRA_DEBUG_UART_AUTO_NONE
|
|
|
|
config TEGRA_DEBUG_UART_AUTO_NONE
|
|
bool "None"
|
|
|
|
config TEGRA_DEBUG_UART_AUTO_ODMDATA
|
|
bool "Via ODMDATA"
|
|
help
|
|
Automatically determines which UART to use for low-level debug based
|
|
on the ODMDATA value. This value is part of the BCT, and is written
|
|
to the boot memory device using nvflash, or other flashing tool.
|
|
When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
|
|
0/1/2/3/4 are UART A/B/C/D/E.
|
|
|
|
config TEGRA_DEBUG_UART_AUTO_SCRATCH
|
|
bool "Via UART scratch register"
|
|
help
|
|
Automatically determines which UART to use for low-level debug based
|
|
on the UART scratch register value. Some bootloaders put ASCII 'D'
|
|
in this register when they initialize their own console UART output.
|
|
Using this option allows the kernel to automatically pick the same
|
|
UART.
|
|
|
|
endchoice
|
|
|
|
config TEGRA_SYSTEM_DMA
|
|
bool "Enable system DMA driver for NVIDIA Tegra SoCs"
|
|
default y
|
|
help
|
|
Adds system DMA functionality for NVIDIA Tegra SoCs, used by
|
|
several Tegra device drivers
|
|
|
|
config TEGRA_EMC_SCALING_ENABLE
|
|
bool "Enable scaling the memory frequency"
|
|
|
|
endif
|