linux_dsm_epyc7002/drivers/gpu/drm/i915/gt
Chris Wilson 7d0eb51dd9 drm/i915: Prevent bonded requests from overtaking each other on preemption
Force bonded requests to run on distinct engines so that they cannot be
shuffled onto the same engine where timeslicing will reverse the order.
A bonded request will often wait on a semaphore signaled by its master,
creating an implicit dependency -- if we ignore that implicit dependency
and allow the bonded request to run on the same engine and before its
master, we will cause a GPU hang. [Whether it will hang the GPU is
debatable, we should keep on timeslicing and each timeslice should be
"accidentally" counted as forward progress, in which case it should run
but at one-half to one-third speed.]

We can prevent this inversion by restricting which engines we allow
ourselves to jump to upon preemption, i.e. baking in the arrangement
established at first execution. (We should also consider capturing the
implicit dependency using i915_sched_add_dependency(), but first we need
to think about the constraints that requires on the execution/retirement
ordering.)

Fixes: 8ee36e048c ("drm/i915/execlists: Minimalistic timeslicing")
References: ee1136908e ("drm/i915/execlists: Virtual engine bonding")
Testcase: igt/gem_exec_balancer/bonded-slice
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190923152844.8914-3-chris@chris-wilson.co.uk
(cherry picked from commit e2144503bf)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2019-10-07 10:44:52 -07:00
..
selftests drm/i915: Markup expected timeline locks for i915_active 2019-08-16 18:02:07 +01:00
uc drm/i915/uc: Never fail on HuC firmware errors 2019-08-18 11:58:41 +01:00
gen6_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen7_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen8_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen9_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_breadcrumbs.c Merge drm/drm-next into drm-intel-next-queued 2019-08-22 00:10:36 -07:00
intel_context_types.h drm/i915/execlists: Lift process_csb() out of the irq-off spinlock 2019-08-16 20:59:02 +01:00
intel_context.c drm/i915: Markup expected timeline locks for i915_active 2019-08-16 18:02:07 +01:00
intel_context.h drm/i915/gt: Mark context->active_count as protected by timeline->mutex 2019-08-16 18:02:06 +01:00
intel_engine_cs.c drm/i915/tgl: Gen12 render context size 2019-08-20 15:23:33 +01:00
intel_engine_pm.c drm/i915: Hold irq-off for the entire fake lock period 2019-09-06 09:53:07 -07:00
intel_engine_pm.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
intel_engine_pool_types.h drm/i915: Replace struct_mutex for batch pool serialisation 2019-08-04 14:31:18 +01:00
intel_engine_pool.c Merge drm/drm-next into drm-intel-next-queued 2019-08-22 00:10:36 -07:00
intel_engine_pool.h drm/i915: Markup expected timeline locks for i915_active 2019-08-16 18:02:07 +01:00
intel_engine_types.h drm/i915: Move engine IDs out of i915_reg.h 2019-08-16 21:52:48 +01:00
intel_engine_user.c drm/i915: Fix up the inverse mapping for default ctx->engines[] 2019-08-08 15:45:35 +01:00
intel_engine_user.h drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
intel_engine.h drm/i915/guc: Use a local cancel_port_requests 2019-08-13 07:54:39 +01:00
intel_gpu_commands.h drm/i915/icl: Add command cache invalidate 2019-08-15 13:13:23 +01:00
intel_gt_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_irq.h drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.h drm/i915: Extract GT powermanagement interrupt handling 2019-08-12 15:36:06 +01:00
intel_gt_pm.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
intel_gt_pm.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
intel_gt_types.h drm/i915: Move engine IDs out of i915_reg.h 2019-08-16 21:52:48 +01:00
intel_gt.c drm/i915: Protect request retirement with timeline->mutex 2019-08-15 23:21:13 +01:00
intel_gt.h drm/i915/gt: Move gt_cleanup_early out of gem_cleanup_early 2019-08-01 17:58:50 +01:00
intel_hangcheck.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_lrc_reg.h drm/i915/tgl: add Gen12 default indirect ctx offset 2019-08-20 14:23:45 +01:00
intel_lrc.c drm/i915: Prevent bonded requests from overtaking each other on preemption 2019-10-07 10:44:52 -07:00
intel_lrc.h
intel_mocs.c drm/i915/gt: Remove stale kerneldoc for internal MOCS functions 2019-08-05 18:27:17 +01:00
intel_mocs.h drm/i915: Move MOCS setup to intel_mocs.c 2019-07-31 07:40:35 -07:00
intel_renderstate.c drm/i915: Serialize against vma moves 2019-08-19 15:25:56 +01:00
intel_renderstate.h drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_reset_types.h drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_reset.c drm/i915: Don't mix srcu tag and negative error codes 2019-10-07 10:44:48 -07:00
intel_reset.h drm/i915: Don't mix srcu tag and negative error codes 2019-10-07 10:44:48 -07:00
intel_ringbuffer.c drm/i915: Extend Haswell GT1 PSMI workaround to all 2019-10-07 10:44:49 -07:00
intel_sseu.c drm/i915/perf: Refactor oa object to better manage resources 2019-08-07 20:34:39 +01:00
intel_sseu.h
intel_timeline_types.h drm/i915/gt: Guard timeline pinning without relying on struct_mutex 2019-08-15 23:21:13 +01:00
intel_timeline.c drm/i915: Hold irq-off for the entire fake lock period 2019-09-06 09:53:07 -07:00
intel_timeline.h drm/i915/gt: Track timeline activeness in enter/exit 2019-08-15 23:16:05 +01:00
intel_workarounds_types.h drm/i915: Add engine name to workaround debug print 2019-07-12 09:55:30 +01:00
intel_workarounds.c drm/i915: Whitelist COMMON_SLICE_CHICKEN2 2019-10-07 10:44:47 -07:00
intel_workarounds.h drm/i915: Convert gt workarounds to intel_gt 2019-06-21 13:48:25 +01:00
Makefile drm/i915: use upstream version of header tests 2019-07-30 12:11:57 +03:00
mock_engine.c drm/i915: Protect request retirement with timeline->mutex 2019-08-15 23:21:13 +01:00
mock_engine.h
selftest_context.c drm/i915/selftests: Check the context size 2019-08-17 09:27:58 +01:00
selftest_engine_cs.c drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
selftest_engine_pm.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_engine.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_engine.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_hangcheck.c drm/i915: Track ggtt fence reservations under its own mutex 2019-08-22 08:53:40 +01:00
selftest_lrc.c drm/i915: Serialize against vma moves 2019-08-19 15:25:56 +01:00
selftest_reset.c drm/i915: Only recover active engines 2019-08-01 13:22:00 +03:00
selftest_timeline.c drm/i915: Markup expected timeline locks for i915_active 2019-08-16 18:02:07 +01:00
selftest_workarounds.c drm/i915: Serialize against vma moves 2019-08-19 15:25:56 +01:00