Jerome Brunet 7b174c5ebe clk: meson: remove obsolete comments ... Over time things changes in CCF and issues have been fixed in meson controllers. Now, clk81 is decently modeled by read-only PLLs, a mux, a divider and a gate. We can remove the FIXME comments related to clk81. Also remove the comment about devm_clk_hw_register, as there is apparently nothing wrong with it. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>		2018-03-13 10:03:58 +01:00
..
axg.c	clk: meson: remove obsolete comments	2018-03-13 10:03:58 +01:00
axg.h	clk: meson-axg: add clock controller drivers	2017-12-14 10:19:37 +01:00
clk-audio-divider.c	clk: meson: add audio clock divider support	2017-04-07 16:50:44 +02:00
clk-cpu.c
clk-mpll.c	clk: meson: add axg misc bit to the mpll driver	2018-02-12 09:49:23 +01:00
clk-pll.c	clk: meson: fix rate calculation of plls with a fractional part	2018-02-12 09:49:23 +01:00
clkc.h	clk: meson: add axg misc bit to the mpll driver	2018-02-12 09:49:23 +01:00
gxbb-aoclk-32k.c	clk: meson: gxbb-aoclk: Add CEC 32k clock	2017-08-04 18:02:02 +02:00
gxbb-aoclk-regmap.c	clk: meson: gxbb-aoclk: Switch to regmap for register access	2017-08-04 18:02:01 +02:00
gxbb-aoclk.c	clk: meson: gxbb-aoclk: Add CEC 32k clock	2017-08-04 18:02:02 +02:00
gxbb-aoclk.h	clk: meson: gxbb-aoclk: Add CEC 32k clock	2017-08-04 18:02:02 +02:00
gxbb.c	clk: meson: remove obsolete comments	2018-03-13 10:03:58 +01:00
gxbb.h	clk: meson: fix rate calculation of plls with a fractional part	2018-02-12 09:49:23 +01:00
Kconfig	clk: meson-axg: add clock controller drivers	2017-12-14 10:19:37 +01:00
Makefile	clk: meson-axg: add clock controller drivers	2017-12-14 10:19:37 +01:00
meson8b.c	clk: meson: remove obsolete comments	2018-03-13 10:03:58 +01:00
meson8b.h	clk: meson: meson8b: register the built-in reset controller	2017-08-04 18:01:58 +02:00