Chen-Yu Tsai 7954dfaee3 clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider ... This patch unifies the sun6i AHB1 clock, originally supported with separate mux and divider clks. It also adds support for the pre-divider on the PLL6 input, thus allowing the clock to be muxed to PLL6 with proper clock rate calculation. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>		2014-12-21 23:51:37 +01:00
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clk-a10-hosc.c	clk: sunxi: Move the 24M oscillator to a file of its own	2014-06-11 09:58:44 +02:00
clk-a20-gmac.c	clk: sunxi: gmac-tx-clk mux is not a CLK_MUX_INDEX_BIT mux	2014-11-23 17:02:57 +01:00
clk-factors.c	clk: Change clk_ops->determine_rate to return a clk_hw as the best parent	2014-12-03 16:21:37 -08:00
clk-factors.h	clk: sunxi: make factors clock mux mask configurable	2014-10-21 21:40:56 +02:00
clk-mod0.c	clk: sunxi: make factors clock mux mask configurable	2014-10-21 21:40:56 +02:00
clk-sun6i-apb0-gates.c	clk: Remove .owner field for driver	2014-09-25 17:43:31 -07:00
clk-sun6i-apb0.c	clk: Remove .owner field for driver	2014-09-25 17:43:31 -07:00
clk-sun6i-ar100.c	clk: Change clk_ops->determine_rate to return a clk_hw as the best parent	2014-12-03 16:21:37 -08:00
clk-sun8i-apb0.c	clk: Remove .owner field for driver	2014-09-25 17:43:31 -07:00
clk-sun8i-mbus.c	clk: sunxi: make factors clock mux mask configurable	2014-10-21 21:40:56 +02:00
clk-sun9i-core.c	clk: sunxi: Add support for A80 basic bus clocks	2014-10-21 21:45:48 +02:00
clk-sunxi.c	clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider	2014-12-21 23:51:37 +01:00
Makefile	clk: sunxi: Add support for A80 basic bus clocks	2014-10-21 21:45:48 +02:00