Yakir Yang 793ce4eb84 drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range ... Both hsync/vsync polarity and interlace mode can be parsed from drm display mode, and dynamic_range and ycbcr_coeff can be judge by the video code. But presumably Exynos still relies on the DT properties, so take good use of mode_fixup() in to achieve the compatibility hacks. Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>		2016-04-05 10:13:02 +08:00
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analogix_dp_core.c	drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range	2016-04-05 10:13:02 +08:00
analogix_dp_core.h	drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range	2016-04-05 10:13:02 +08:00
analogix_dp_reg.c	drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range	2016-04-05 10:13:02 +08:00
analogix_dp_reg.h
Kconfig
Makefile