mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e874a66977
This commit implements the base CPU clocks for sunxi devices. It has
been tested using a slightly modified cpufreq driver from the
linux-sunxi 3.0 tree.
Additionally, document the new bindings introduced by this patch.
Idling:
/ # cat /sys/kernel/debug/clk/clk_summary
clock enable_cnt prepare_cnt rate
---------------------------------------------------------------------
osc32k 0 0 32768
osc24M_fixed 0 0 24000000
osc24M 0 0 24000000
apb1_mux 0 0 24000000
apb1 0 0 24000000
pll1 0 0 60000000
cpu 0 0 60000000
axi 0 0 60000000
ahb 0 0 60000000
apb0 0 0 30000000
dummy 0 0 0
After "yes >/dev/null &":
/ # cat /sys/kernel/debug/clk/clk_summary
clock enable_cnt prepare_cnt rate
---------------------------------------------------------------------
osc32k 0 0 32768
osc24M_fixed 0 0 24000000
osc24M 0 0 24000000
apb1_mux 0 0 24000000
apb1 0 0 24000000
pll1 0 0 1008000000
cpu 0 0 1008000000
axi 0 0 336000000
ahb 0 0 168000000
apb0 0 0 84000000
dummy 0 0 0
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
28 lines
612 B
C
28 lines
612 B
C
#ifndef __MACH_SUNXI_CLK_FACTORS_H
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#define __MACH_SUNXI_CLK_FACTORS_H
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#define SUNXI_FACTORS_NOT_APPLICABLE (0)
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struct clk_factors_config {
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u8 nshift;
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u8 nwidth;
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u8 kshift;
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u8 kwidth;
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u8 mshift;
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u8 mwidth;
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u8 pshift;
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u8 pwidth;
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};
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struct clk *clk_register_factors(struct device *dev, const char *name,
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const char *parent_name,
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unsigned long flags, void __iomem *reg,
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struct clk_factors_config *config,
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void (*get_factors) (u32 *rate, u32 parent_rate,
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u8 *n, u8 *k, u8 *m, u8 *p),
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spinlock_t *lock);
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#endif
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