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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4107da2a28
This adds a core driver for 88PM8607 found in Marvell DKB development platform. This driver is a proxy for all accesses to 88PM8607 sub-drivers which will be merged on top of this one, RTC, regulators, battery and so on. This chip is manufactured by Marvell. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
218 lines
5.8 KiB
C
218 lines
5.8 KiB
C
/*
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* Marvell 88PM8607 Interface
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*
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* Copyright (C) 2009 Marvell International Ltd.
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* Haojian Zhuang <haojian.zhuang@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_MFD_88PM8607_H
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#define __LINUX_MFD_88PM8607_H
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enum {
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PM8607_ID_BUCK1 = 0,
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PM8607_ID_BUCK2,
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PM8607_ID_BUCK3,
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PM8607_ID_LDO1,
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PM8607_ID_LDO2,
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PM8607_ID_LDO3,
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PM8607_ID_LDO4,
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PM8607_ID_LDO5,
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PM8607_ID_LDO6,
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PM8607_ID_LDO7,
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PM8607_ID_LDO8,
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PM8607_ID_LDO9,
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PM8607_ID_LDO10,
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PM8607_ID_LDO12,
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PM8607_ID_LDO14,
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PM8607_ID_RG_MAX,
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};
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#define CHIP_ID (0x40)
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#define CHIP_ID_MASK (0xF8)
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/* Interrupt Registers */
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#define PM8607_STATUS_1 (0x01)
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#define PM8607_STATUS_2 (0x02)
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#define PM8607_INT_STATUS1 (0x03)
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#define PM8607_INT_STATUS2 (0x04)
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#define PM8607_INT_STATUS3 (0x05)
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#define PM8607_INT_MASK_1 (0x06)
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#define PM8607_INT_MASK_2 (0x07)
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#define PM8607_INT_MASK_3 (0x08)
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/* Regulator Control Registers */
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#define PM8607_LDO1 (0x10)
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#define PM8607_LDO2 (0x11)
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#define PM8607_LDO3 (0x12)
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#define PM8607_LDO4 (0x13)
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#define PM8607_LDO5 (0x14)
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#define PM8607_LDO6 (0x15)
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#define PM8607_LDO7 (0x16)
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#define PM8607_LDO8 (0x17)
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#define PM8607_LDO9 (0x18)
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#define PM8607_LDO10 (0x19)
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#define PM8607_LDO12 (0x1A)
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#define PM8607_LDO14 (0x1B)
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#define PM8607_SLEEP_MODE1 (0x1C)
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#define PM8607_SLEEP_MODE2 (0x1D)
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#define PM8607_SLEEP_MODE3 (0x1E)
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#define PM8607_SLEEP_MODE4 (0x1F)
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#define PM8607_GO (0x20)
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#define PM8607_SLEEP_BUCK1 (0x21)
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#define PM8607_SLEEP_BUCK2 (0x22)
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#define PM8607_SLEEP_BUCK3 (0x23)
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#define PM8607_BUCK1 (0x24)
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#define PM8607_BUCK2 (0x25)
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#define PM8607_BUCK3 (0x26)
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#define PM8607_BUCK_CONTROLS (0x27)
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#define PM8607_SUPPLIES_EN11 (0x2B)
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#define PM8607_SUPPLIES_EN12 (0x2C)
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#define PM8607_GROUP1 (0x2D)
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#define PM8607_GROUP2 (0x2E)
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#define PM8607_GROUP3 (0x2F)
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#define PM8607_GROUP4 (0x30)
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#define PM8607_GROUP5 (0x31)
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#define PM8607_GROUP6 (0x32)
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#define PM8607_SUPPLIES_EN21 (0x33)
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#define PM8607_SUPPLIES_EN22 (0x34)
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/* RTC Control Registers */
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#define PM8607_RTC1 (0xA0)
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#define PM8607_RTC_COUNTER1 (0xA1)
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#define PM8607_RTC_COUNTER2 (0xA2)
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#define PM8607_RTC_COUNTER3 (0xA3)
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#define PM8607_RTC_COUNTER4 (0xA4)
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#define PM8607_RTC_EXPIRE1 (0xA5)
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#define PM8607_RTC_EXPIRE2 (0xA6)
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#define PM8607_RTC_EXPIRE3 (0xA7)
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#define PM8607_RTC_EXPIRE4 (0xA8)
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#define PM8607_RTC_TRIM1 (0xA9)
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#define PM8607_RTC_TRIM2 (0xAA)
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#define PM8607_RTC_TRIM3 (0xAB)
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#define PM8607_RTC_TRIM4 (0xAC)
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#define PM8607_RTC_MISC1 (0xAD)
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#define PM8607_RTC_MISC2 (0xAE)
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#define PM8607_RTC_MISC3 (0xAF)
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/* Misc Registers */
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#define PM8607_CHIP_ID (0x00)
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#define PM8607_LDO1 (0x10)
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#define PM8607_DVC3 (0x26)
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#define PM8607_MISC1 (0x40)
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/* bit definitions for PM8607 events */
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#define PM8607_EVENT_ONKEY (1 << 0)
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#define PM8607_EVENT_EXTON (1 << 1)
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#define PM8607_EVENT_CHG (1 << 2)
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#define PM8607_EVENT_BAT (1 << 3)
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#define PM8607_EVENT_RTC (1 << 4)
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#define PM8607_EVENT_CC (1 << 5)
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#define PM8607_EVENT_VBAT (1 << 8)
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#define PM8607_EVENT_VCHG (1 << 9)
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#define PM8607_EVENT_VSYS (1 << 10)
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#define PM8607_EVENT_TINT (1 << 11)
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#define PM8607_EVENT_GPADC0 (1 << 12)
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#define PM8607_EVENT_GPADC1 (1 << 13)
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#define PM8607_EVENT_GPADC2 (1 << 14)
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#define PM8607_EVENT_GPADC3 (1 << 15)
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#define PM8607_EVENT_AUDIO_SHORT (1 << 16)
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#define PM8607_EVENT_PEN (1 << 17)
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#define PM8607_EVENT_HEADSET (1 << 18)
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#define PM8607_EVENT_HOOK (1 << 19)
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#define PM8607_EVENT_MICIN (1 << 20)
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#define PM8607_EVENT_CHG_TIMEOUT (1 << 21)
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#define PM8607_EVENT_CHG_DONE (1 << 22)
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#define PM8607_EVENT_CHG_FAULT (1 << 23)
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/* bit definitions of Status Query Interface */
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#define PM8607_STATUS_CC (1 << 3)
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#define PM8607_STATUS_PEN (1 << 4)
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#define PM8607_STATUS_HEADSET (1 << 5)
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#define PM8607_STATUS_HOOK (1 << 6)
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#define PM8607_STATUS_MICIN (1 << 7)
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#define PM8607_STATUS_ONKEY (1 << 8)
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#define PM8607_STATUS_EXTON (1 << 9)
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#define PM8607_STATUS_CHG (1 << 10)
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#define PM8607_STATUS_BAT (1 << 11)
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#define PM8607_STATUS_VBUS (1 << 12)
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#define PM8607_STATUS_OV (1 << 13)
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/* bit definitions of BUCK3 */
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#define PM8607_BUCK3_DOUBLE (1 << 6)
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/* bit definitions of Misc1 */
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#define PM8607_MISC1_PI2C (1 << 0)
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/* Interrupt Number in 88PM8607 */
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enum {
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PM8607_IRQ_ONKEY = 0,
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PM8607_IRQ_EXTON,
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PM8607_IRQ_CHG,
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PM8607_IRQ_BAT,
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PM8607_IRQ_RTC,
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PM8607_IRQ_VBAT = 8,
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PM8607_IRQ_VCHG,
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PM8607_IRQ_VSYS,
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PM8607_IRQ_TINT,
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PM8607_IRQ_GPADC0,
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PM8607_IRQ_GPADC1,
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PM8607_IRQ_GPADC2,
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PM8607_IRQ_GPADC3,
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PM8607_IRQ_AUDIO_SHORT = 16,
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PM8607_IRQ_PEN,
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PM8607_IRQ_HEADSET,
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PM8607_IRQ_HOOK,
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PM8607_IRQ_MICIN,
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PM8607_IRQ_CHG_FAIL,
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PM8607_IRQ_CHG_DONE,
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PM8607_IRQ_CHG_FAULT,
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};
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enum {
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PM8607_CHIP_A0 = 0x40,
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PM8607_CHIP_A1 = 0x41,
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PM8607_CHIP_B0 = 0x48,
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};
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struct pm8607_chip {
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struct device *dev;
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struct mutex io_lock;
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struct i2c_client *client;
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int (*read)(struct pm8607_chip *chip, int reg, int bytes, void *dest);
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int (*write)(struct pm8607_chip *chip, int reg, int bytes, void *src);
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int buck3_double; /* DVC ramp slope double */
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unsigned char chip_id;
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};
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#define PM8607_MAX_REGULATOR 15 /* 3 Bucks, 12 LDOs */
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enum {
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GI2C_PORT = 0,
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PI2C_PORT,
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};
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struct pm8607_platform_data {
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int i2c_port; /* Controlled by GI2C or PI2C */
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struct regulator_init_data *regulator[PM8607_MAX_REGULATOR];
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};
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extern int pm8607_reg_read(struct pm8607_chip *, int);
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extern int pm8607_reg_write(struct pm8607_chip *, int, unsigned char);
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extern int pm8607_bulk_read(struct pm8607_chip *, int, int,
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unsigned char *);
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extern int pm8607_bulk_write(struct pm8607_chip *, int, int,
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unsigned char *);
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extern int pm8607_set_bits(struct pm8607_chip *, int, unsigned char,
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unsigned char);
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#endif /* __LINUX_MFD_88PM8607_H */
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