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mfd: Add 88PM8607 driver
This adds a core driver for 88PM8607 found in Marvell DKB development platform. This driver is a proxy for all accesses to 88PM8607 sub-drivers which will be merged on top of this one, RTC, regulators, battery and so on. This chip is manufactured by Marvell. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
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302
drivers/mfd/88pm8607.c
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302
drivers/mfd/88pm8607.c
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@ -0,0 +1,302 @@
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/*
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* Base driver for Marvell 88PM8607
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*
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* Copyright (C) 2009 Marvell International Ltd.
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* Haojian Zhuang <haojian.zhuang@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/88pm8607.h>
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#define PM8607_REG_RESOURCE(_start, _end) \
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{ \
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.start = PM8607_##_start, \
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.end = PM8607_##_end, \
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.flags = IORESOURCE_IO, \
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}
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static struct resource pm8607_regulator_resources[] = {
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PM8607_REG_RESOURCE(BUCK1, BUCK1),
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PM8607_REG_RESOURCE(BUCK2, BUCK2),
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PM8607_REG_RESOURCE(BUCK3, BUCK3),
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PM8607_REG_RESOURCE(LDO1, LDO1),
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PM8607_REG_RESOURCE(LDO2, LDO2),
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PM8607_REG_RESOURCE(LDO3, LDO3),
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PM8607_REG_RESOURCE(LDO4, LDO4),
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PM8607_REG_RESOURCE(LDO5, LDO5),
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PM8607_REG_RESOURCE(LDO6, LDO6),
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PM8607_REG_RESOURCE(LDO7, LDO7),
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PM8607_REG_RESOURCE(LDO8, LDO8),
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PM8607_REG_RESOURCE(LDO9, LDO9),
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PM8607_REG_RESOURCE(LDO10, LDO10),
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PM8607_REG_RESOURCE(LDO12, LDO12),
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PM8607_REG_RESOURCE(LDO14, LDO14),
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};
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#define PM8607_REG_DEVS(_name, _id) \
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{ \
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.name = "88pm8607-" #_name, \
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.num_resources = 1, \
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.resources = &pm8607_regulator_resources[PM8607_ID_##_id], \
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}
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static struct mfd_cell pm8607_devs[] = {
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PM8607_REG_DEVS(buck1, BUCK1),
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PM8607_REG_DEVS(buck2, BUCK2),
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PM8607_REG_DEVS(buck3, BUCK3),
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PM8607_REG_DEVS(ldo1, LDO1),
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PM8607_REG_DEVS(ldo2, LDO2),
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PM8607_REG_DEVS(ldo3, LDO3),
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PM8607_REG_DEVS(ldo4, LDO4),
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PM8607_REG_DEVS(ldo5, LDO5),
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PM8607_REG_DEVS(ldo6, LDO6),
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PM8607_REG_DEVS(ldo7, LDO7),
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PM8607_REG_DEVS(ldo8, LDO8),
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PM8607_REG_DEVS(ldo9, LDO9),
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PM8607_REG_DEVS(ldo10, LDO10),
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PM8607_REG_DEVS(ldo12, LDO12),
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PM8607_REG_DEVS(ldo14, LDO14),
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};
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static inline int pm8607_read_device(struct pm8607_chip *chip,
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int reg, int bytes, void *dest)
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{
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struct i2c_client *i2c = chip->client;
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unsigned char data;
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int ret;
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data = (unsigned char)reg;
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ret = i2c_master_send(i2c, &data, 1);
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if (ret < 0)
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return ret;
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ret = i2c_master_recv(i2c, dest, bytes);
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if (ret < 0)
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return ret;
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return 0;
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}
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static inline int pm8607_write_device(struct pm8607_chip *chip,
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int reg, int bytes, void *src)
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{
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struct i2c_client *i2c = chip->client;
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unsigned char buf[bytes + 1];
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int ret;
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buf[0] = (unsigned char)reg;
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memcpy(&buf[1], src, bytes);
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ret = i2c_master_send(i2c, buf, bytes + 1);
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if (ret < 0)
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return ret;
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return 0;
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}
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int pm8607_reg_read(struct pm8607_chip *chip, int reg)
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{
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unsigned char data;
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int ret;
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mutex_lock(&chip->io_lock);
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ret = chip->read(chip, reg, 1, &data);
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mutex_unlock(&chip->io_lock);
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if (ret < 0)
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return ret;
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else
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return (int)data;
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}
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EXPORT_SYMBOL(pm8607_reg_read);
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int pm8607_reg_write(struct pm8607_chip *chip, int reg,
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unsigned char data)
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{
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int ret;
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mutex_lock(&chip->io_lock);
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ret = chip->write(chip, reg, 1, &data);
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mutex_unlock(&chip->io_lock);
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return ret;
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}
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EXPORT_SYMBOL(pm8607_reg_write);
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int pm8607_bulk_read(struct pm8607_chip *chip, int reg,
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int count, unsigned char *buf)
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{
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int ret;
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mutex_lock(&chip->io_lock);
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ret = chip->read(chip, reg, count, buf);
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mutex_unlock(&chip->io_lock);
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return ret;
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}
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EXPORT_SYMBOL(pm8607_bulk_read);
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int pm8607_bulk_write(struct pm8607_chip *chip, int reg,
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int count, unsigned char *buf)
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{
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int ret;
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mutex_lock(&chip->io_lock);
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ret = chip->write(chip, reg, count, buf);
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mutex_unlock(&chip->io_lock);
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return ret;
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}
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EXPORT_SYMBOL(pm8607_bulk_write);
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int pm8607_set_bits(struct pm8607_chip *chip, int reg,
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unsigned char mask, unsigned char data)
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{
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unsigned char value;
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int ret;
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mutex_lock(&chip->io_lock);
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ret = chip->read(chip, reg, 1, &value);
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if (ret < 0)
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goto out;
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value &= ~mask;
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value |= data;
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ret = chip->write(chip, reg, 1, &value);
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out:
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mutex_unlock(&chip->io_lock);
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return ret;
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}
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EXPORT_SYMBOL(pm8607_set_bits);
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static const struct i2c_device_id pm8607_id_table[] = {
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{ "88PM8607", 0 },
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{}
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};
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MODULE_DEVICE_TABLE(i2c, pm8607_id_table);
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static int __devinit pm8607_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct pm8607_platform_data *pdata = client->dev.platform_data;
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struct pm8607_chip *chip;
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int i, count;
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int ret;
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chip = kzalloc(sizeof(struct pm8607_chip), GFP_KERNEL);
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if (chip == NULL)
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return -ENOMEM;
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chip->client = client;
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chip->dev = &client->dev;
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chip->read = pm8607_read_device;
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chip->write = pm8607_write_device;
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i2c_set_clientdata(client, chip);
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mutex_init(&chip->io_lock);
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dev_set_drvdata(chip->dev, chip);
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ret = pm8607_reg_read(chip, PM8607_CHIP_ID);
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if (ret < 0) {
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dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret);
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goto out;
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}
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if ((ret & CHIP_ID_MASK) == CHIP_ID)
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dev_info(chip->dev, "Marvell 88PM8607 (ID: %02x) detected\n",
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ret);
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else {
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dev_err(chip->dev, "Failed to detect Marvell 88PM8607. "
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"Chip ID: %02x\n", ret);
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goto out;
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}
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chip->chip_id = ret;
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ret = pm8607_reg_read(chip, PM8607_BUCK3);
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if (ret < 0) {
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dev_err(chip->dev, "Failed to read BUCK3 register: %d\n", ret);
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goto out;
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}
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if (ret & PM8607_BUCK3_DOUBLE)
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chip->buck3_double = 1;
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ret = pm8607_reg_read(chip, PM8607_MISC1);
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if (ret < 0) {
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dev_err(chip->dev, "Failed to read MISC1 register: %d\n", ret);
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goto out;
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}
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if (pdata->i2c_port == PI2C_PORT)
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ret |= PM8607_MISC1_PI2C;
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else
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ret &= ~PM8607_MISC1_PI2C;
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ret = pm8607_reg_write(chip, PM8607_MISC1, ret);
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if (ret < 0) {
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dev_err(chip->dev, "Failed to write MISC1 register: %d\n", ret);
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goto out;
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}
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count = ARRAY_SIZE(pm8607_devs);
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for (i = 0; i < count; i++) {
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ret = mfd_add_devices(chip->dev, i, &pm8607_devs[i],
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1, NULL, 0);
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if (ret != 0) {
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dev_err(chip->dev, "Failed to add subdevs\n");
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goto out;
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}
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}
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return 0;
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out:
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i2c_set_clientdata(client, NULL);
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kfree(chip);
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return ret;
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}
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static int __devexit pm8607_remove(struct i2c_client *client)
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{
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struct pm8607_chip *chip = i2c_get_clientdata(client);
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mfd_remove_devices(chip->dev);
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kfree(chip);
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return 0;
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}
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static struct i2c_driver pm8607_driver = {
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.driver = {
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.name = "88PM8607",
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.owner = THIS_MODULE,
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},
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.probe = pm8607_probe,
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.remove = __devexit_p(pm8607_remove),
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.id_table = pm8607_id_table,
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};
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static int __init pm8607_init(void)
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{
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int ret;
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ret = i2c_add_driver(&pm8607_driver);
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if (ret != 0)
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pr_err("Failed to register 88PM8607 I2C driver: %d\n", ret);
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return ret;
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}
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subsys_initcall(pm8607_init);
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static void __exit pm8607_exit(void)
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{
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i2c_del_driver(&pm8607_driver);
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}
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module_exit(pm8607_exit);
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MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM8607");
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MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
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MODULE_LICENSE("GPL");
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@ -319,6 +319,16 @@ config EZX_PCAP
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This enables the PCAP ASIC present on EZX Phones. This is
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needed for MMC, TouchScreen, Sound, USB, etc..
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config MFD_88PM8607
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bool "Support Marvell 88PM8607"
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depends on I2C
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select MFD_CORE
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help
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This supports for Marvell 88PM8607 Power Management IC. This includes
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the I2C driver and the core APIs _only_, you have to select
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individual components like voltage regulators, RTC and
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battery-charger under the corresponding menus.
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endmenu
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menu "Multimedia Capabilities Port drivers"
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@ -52,3 +52,4 @@ obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o
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obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o
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obj-$(CONFIG_AB3100_CORE) += ab3100-core.o
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obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o
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obj-$(CONFIG_MFD_88PM8607) += 88pm8607.o
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217
include/linux/mfd/88pm8607.h
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217
include/linux/mfd/88pm8607.h
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/*
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* Marvell 88PM8607 Interface
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*
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* Copyright (C) 2009 Marvell International Ltd.
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* Haojian Zhuang <haojian.zhuang@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_MFD_88PM8607_H
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#define __LINUX_MFD_88PM8607_H
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enum {
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PM8607_ID_BUCK1 = 0,
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PM8607_ID_BUCK2,
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PM8607_ID_BUCK3,
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PM8607_ID_LDO1,
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PM8607_ID_LDO2,
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PM8607_ID_LDO3,
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PM8607_ID_LDO4,
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PM8607_ID_LDO5,
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PM8607_ID_LDO6,
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PM8607_ID_LDO7,
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PM8607_ID_LDO8,
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PM8607_ID_LDO9,
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PM8607_ID_LDO10,
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PM8607_ID_LDO12,
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PM8607_ID_LDO14,
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PM8607_ID_RG_MAX,
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};
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#define CHIP_ID (0x40)
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#define CHIP_ID_MASK (0xF8)
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/* Interrupt Registers */
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#define PM8607_STATUS_1 (0x01)
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#define PM8607_STATUS_2 (0x02)
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#define PM8607_INT_STATUS1 (0x03)
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#define PM8607_INT_STATUS2 (0x04)
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#define PM8607_INT_STATUS3 (0x05)
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#define PM8607_INT_MASK_1 (0x06)
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#define PM8607_INT_MASK_2 (0x07)
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#define PM8607_INT_MASK_3 (0x08)
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/* Regulator Control Registers */
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#define PM8607_LDO1 (0x10)
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#define PM8607_LDO2 (0x11)
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#define PM8607_LDO3 (0x12)
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#define PM8607_LDO4 (0x13)
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#define PM8607_LDO5 (0x14)
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#define PM8607_LDO6 (0x15)
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#define PM8607_LDO7 (0x16)
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#define PM8607_LDO8 (0x17)
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#define PM8607_LDO9 (0x18)
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#define PM8607_LDO10 (0x19)
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#define PM8607_LDO12 (0x1A)
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#define PM8607_LDO14 (0x1B)
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#define PM8607_SLEEP_MODE1 (0x1C)
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#define PM8607_SLEEP_MODE2 (0x1D)
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#define PM8607_SLEEP_MODE3 (0x1E)
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#define PM8607_SLEEP_MODE4 (0x1F)
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#define PM8607_GO (0x20)
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#define PM8607_SLEEP_BUCK1 (0x21)
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#define PM8607_SLEEP_BUCK2 (0x22)
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#define PM8607_SLEEP_BUCK3 (0x23)
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#define PM8607_BUCK1 (0x24)
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#define PM8607_BUCK2 (0x25)
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#define PM8607_BUCK3 (0x26)
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#define PM8607_BUCK_CONTROLS (0x27)
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#define PM8607_SUPPLIES_EN11 (0x2B)
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#define PM8607_SUPPLIES_EN12 (0x2C)
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#define PM8607_GROUP1 (0x2D)
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#define PM8607_GROUP2 (0x2E)
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#define PM8607_GROUP3 (0x2F)
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#define PM8607_GROUP4 (0x30)
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#define PM8607_GROUP5 (0x31)
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#define PM8607_GROUP6 (0x32)
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#define PM8607_SUPPLIES_EN21 (0x33)
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#define PM8607_SUPPLIES_EN22 (0x34)
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/* RTC Control Registers */
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#define PM8607_RTC1 (0xA0)
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#define PM8607_RTC_COUNTER1 (0xA1)
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#define PM8607_RTC_COUNTER2 (0xA2)
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#define PM8607_RTC_COUNTER3 (0xA3)
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#define PM8607_RTC_COUNTER4 (0xA4)
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#define PM8607_RTC_EXPIRE1 (0xA5)
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#define PM8607_RTC_EXPIRE2 (0xA6)
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#define PM8607_RTC_EXPIRE3 (0xA7)
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#define PM8607_RTC_EXPIRE4 (0xA8)
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#define PM8607_RTC_TRIM1 (0xA9)
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#define PM8607_RTC_TRIM2 (0xAA)
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#define PM8607_RTC_TRIM3 (0xAB)
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#define PM8607_RTC_TRIM4 (0xAC)
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#define PM8607_RTC_MISC1 (0xAD)
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#define PM8607_RTC_MISC2 (0xAE)
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#define PM8607_RTC_MISC3 (0xAF)
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/* Misc Registers */
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#define PM8607_CHIP_ID (0x00)
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#define PM8607_LDO1 (0x10)
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#define PM8607_DVC3 (0x26)
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#define PM8607_MISC1 (0x40)
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||||
|
||||
/* bit definitions for PM8607 events */
|
||||
#define PM8607_EVENT_ONKEY (1 << 0)
|
||||
#define PM8607_EVENT_EXTON (1 << 1)
|
||||
#define PM8607_EVENT_CHG (1 << 2)
|
||||
#define PM8607_EVENT_BAT (1 << 3)
|
||||
#define PM8607_EVENT_RTC (1 << 4)
|
||||
#define PM8607_EVENT_CC (1 << 5)
|
||||
#define PM8607_EVENT_VBAT (1 << 8)
|
||||
#define PM8607_EVENT_VCHG (1 << 9)
|
||||
#define PM8607_EVENT_VSYS (1 << 10)
|
||||
#define PM8607_EVENT_TINT (1 << 11)
|
||||
#define PM8607_EVENT_GPADC0 (1 << 12)
|
||||
#define PM8607_EVENT_GPADC1 (1 << 13)
|
||||
#define PM8607_EVENT_GPADC2 (1 << 14)
|
||||
#define PM8607_EVENT_GPADC3 (1 << 15)
|
||||
#define PM8607_EVENT_AUDIO_SHORT (1 << 16)
|
||||
#define PM8607_EVENT_PEN (1 << 17)
|
||||
#define PM8607_EVENT_HEADSET (1 << 18)
|
||||
#define PM8607_EVENT_HOOK (1 << 19)
|
||||
#define PM8607_EVENT_MICIN (1 << 20)
|
||||
#define PM8607_EVENT_CHG_TIMEOUT (1 << 21)
|
||||
#define PM8607_EVENT_CHG_DONE (1 << 22)
|
||||
#define PM8607_EVENT_CHG_FAULT (1 << 23)
|
||||
|
||||
/* bit definitions of Status Query Interface */
|
||||
#define PM8607_STATUS_CC (1 << 3)
|
||||
#define PM8607_STATUS_PEN (1 << 4)
|
||||
#define PM8607_STATUS_HEADSET (1 << 5)
|
||||
#define PM8607_STATUS_HOOK (1 << 6)
|
||||
#define PM8607_STATUS_MICIN (1 << 7)
|
||||
#define PM8607_STATUS_ONKEY (1 << 8)
|
||||
#define PM8607_STATUS_EXTON (1 << 9)
|
||||
#define PM8607_STATUS_CHG (1 << 10)
|
||||
#define PM8607_STATUS_BAT (1 << 11)
|
||||
#define PM8607_STATUS_VBUS (1 << 12)
|
||||
#define PM8607_STATUS_OV (1 << 13)
|
||||
|
||||
/* bit definitions of BUCK3 */
|
||||
#define PM8607_BUCK3_DOUBLE (1 << 6)
|
||||
|
||||
/* bit definitions of Misc1 */
|
||||
#define PM8607_MISC1_PI2C (1 << 0)
|
||||
|
||||
/* Interrupt Number in 88PM8607 */
|
||||
enum {
|
||||
PM8607_IRQ_ONKEY = 0,
|
||||
PM8607_IRQ_EXTON,
|
||||
PM8607_IRQ_CHG,
|
||||
PM8607_IRQ_BAT,
|
||||
PM8607_IRQ_RTC,
|
||||
PM8607_IRQ_VBAT = 8,
|
||||
PM8607_IRQ_VCHG,
|
||||
PM8607_IRQ_VSYS,
|
||||
PM8607_IRQ_TINT,
|
||||
PM8607_IRQ_GPADC0,
|
||||
PM8607_IRQ_GPADC1,
|
||||
PM8607_IRQ_GPADC2,
|
||||
PM8607_IRQ_GPADC3,
|
||||
PM8607_IRQ_AUDIO_SHORT = 16,
|
||||
PM8607_IRQ_PEN,
|
||||
PM8607_IRQ_HEADSET,
|
||||
PM8607_IRQ_HOOK,
|
||||
PM8607_IRQ_MICIN,
|
||||
PM8607_IRQ_CHG_FAIL,
|
||||
PM8607_IRQ_CHG_DONE,
|
||||
PM8607_IRQ_CHG_FAULT,
|
||||
};
|
||||
|
||||
enum {
|
||||
PM8607_CHIP_A0 = 0x40,
|
||||
PM8607_CHIP_A1 = 0x41,
|
||||
PM8607_CHIP_B0 = 0x48,
|
||||
};
|
||||
|
||||
|
||||
struct pm8607_chip {
|
||||
struct device *dev;
|
||||
struct mutex io_lock;
|
||||
struct i2c_client *client;
|
||||
|
||||
int (*read)(struct pm8607_chip *chip, int reg, int bytes, void *dest);
|
||||
int (*write)(struct pm8607_chip *chip, int reg, int bytes, void *src);
|
||||
|
||||
int buck3_double; /* DVC ramp slope double */
|
||||
unsigned char chip_id;
|
||||
|
||||
};
|
||||
|
||||
#define PM8607_MAX_REGULATOR 15 /* 3 Bucks, 12 LDOs */
|
||||
|
||||
enum {
|
||||
GI2C_PORT = 0,
|
||||
PI2C_PORT,
|
||||
};
|
||||
|
||||
struct pm8607_platform_data {
|
||||
int i2c_port; /* Controlled by GI2C or PI2C */
|
||||
struct regulator_init_data *regulator[PM8607_MAX_REGULATOR];
|
||||
};
|
||||
|
||||
extern int pm8607_reg_read(struct pm8607_chip *, int);
|
||||
extern int pm8607_reg_write(struct pm8607_chip *, int, unsigned char);
|
||||
extern int pm8607_bulk_read(struct pm8607_chip *, int, int,
|
||||
unsigned char *);
|
||||
extern int pm8607_bulk_write(struct pm8607_chip *, int, int,
|
||||
unsigned char *);
|
||||
extern int pm8607_set_bits(struct pm8607_chip *, int, unsigned char,
|
||||
unsigned char);
|
||||
#endif /* __LINUX_MFD_88PM8607_H */
|
Loading…
Reference in New Issue
Block a user