linux_dsm_epyc7002/drivers/gpu/drm/i915
Ville Syrjälä 6ca2aeb27b drm/i915: Add support for CHV pipe B sprite CSC
CHV has a programmable CSC unit on the pipe B sprites. Program the unit
appropriately for BT.601 limited range YCbCr to full range RGB color
conversion. This matches the programming we currently do for sprites
on the other pipes and on other platforms.

It seems the CSC only works when the input data is YCbCr. For RGB
pixel formats it doesn't matter what we program into the CSC registers.
Doesn't make much sense to me especially since the register names give
the impression that RGB input data would also work. But that's how
it behaves here.

In the review discussions there's been some nice math to explain the
values obtained here. First about the YCbCr->RGB matrix:

"I had the RGB->YCbCr matrix, inverted it and the values came out. But they
should match the wikipedia article. Also keep in mind that the coefficients
are in .12 in fixed point format, hence we need a 1<<12 factor. So let's
try it:

Kb=.114
Kr=.299
(1<<12) * 255/219 ~= 4769
-(1<<12) * 255/112*(1-Kb)*Kb/(1-Kb-Kr) ~= -1605
-(1<<12) * 255/112*(1-Kr)*Kr/(1-Kb-Kr) ~= -3330
(1<<12) * 255/112*(1-Kr) ~= 6537
(1<<12) * 255/112*(1-Kb) ~= 8263

"Looks like the same values to me."

And then about the limits used for clamping:

"> where did you get these min/max?

"The hardware apparently deals in 10bit values, so we need to multiply everything
by 4 when we start with the 8bit min/max values.

Y = [16:235] * 4 = [64:940]
CbCr = ([16:240] - 128) * 4 = [-112:112] * 4 = [-448:448]

"The -128 being the -0.5 bias that the hardware already applied before
the data entered the CSC unit."

Raw data is also supplied in 10bpc in the registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by Rodrigo Vivi <rodrigo.vivi@intel.com>
[danvet: Copypaste explanations&math from the review discussion.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-04 23:22:10 +01:00
..
dvo_ch7xxx.c
dvo_ch7017.c
dvo_ivch.c
dvo_ns2501.c drm/i915: Check pixel clock in ns2501 mode_valid hook 2014-09-03 11:05:21 +02:00
dvo_sil164.c
dvo_tfp410.c
dvo.h
i915_cmd_parser.c drm/i915: Abort command parsing for chained batches 2014-11-04 14:04:54 +01:00
i915_debugfs.c drm/i915: transform INTEL_OUTPUT_* into an enum 2014-11-04 23:21:58 +01:00
i915_dma.c drm/i915: unify switcheroo and legacy suspend/resume handlers 2014-10-24 16:34:21 +02:00
i915_drv.c drm/i915: run hsw_disable_pc8() later on resume 2014-11-04 23:22:10 +01:00
i915_drv.h drm/i915/audio: pass intel_encoder on to platform specific ELD functions 2014-11-04 23:21:58 +01:00
i915_gem_context.c drm/i915: Move flags describing VMA mappings into the VMA 2014-11-04 14:04:51 +01:00
i915_gem_debug.c
i915_gem_dmabuf.c
i915_gem_evict.c drm/i915: fix another use-after-free in i915_gem_evict_everything 2014-09-19 14:41:16 +02:00
i915_gem_execbuffer.c drm/i915: Abort command parsing for chained batches 2014-11-04 14:04:54 +01:00
i915_gem_gtt.c drm/i915: Move flags describing VMA mappings into the VMA 2014-11-04 14:04:51 +01:00
i915_gem_gtt.h drm/i915: Move flags describing VMA mappings into the VMA 2014-11-04 14:04:51 +01:00
i915_gem_render_state.c drm/i915 Add golden context support for Gen9 2014-11-04 14:04:55 +01:00
i915_gem_render_state.h drm/i915/bdw: Render state init for Execlists 2014-09-03 11:04:52 +02:00
i915_gem_stolen.c drm/i915: Move flags describing VMA mappings into the VMA 2014-11-04 14:04:51 +01:00
i915_gem_tiling.c drm/i915: preserve swizzle settings if necessary v4 2014-10-24 16:34:09 +02:00
i915_gem_userptr.c drm/i915: Do not leak pages when freeing userptr objects 2014-09-29 15:31:01 +02:00
i915_gem.c drm/i915: Move flags describing VMA mappings into the VMA 2014-11-04 14:04:51 +01:00
i915_gpu_error.c drm/i915: Move flags describing VMA mappings into the VMA 2014-11-04 14:04:51 +01:00
i915_ioc32.c drm/i915: remove redundant #ifdef CONFIG_COMPAT 2014-10-24 16:34:07 +02:00
i915_irq.c drm/i915: Filter gmch fifo underruns in the shared handler 2014-10-24 16:33:55 +02:00
i915_params.c Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux 2014-10-14 09:39:08 +02:00
i915_reg.h drm/i915: Add support for CHV pipe B sprite CSC 2014-11-04 23:22:10 +01:00
i915_suspend.c
i915_sysfs.c drm/i915: Do not export RC6p and RC6pp if they don't exist 2014-10-24 16:34:00 +02:00
i915_trace_points.c
i915_trace.h
i915_ums.c
intel_acpi.c
intel_audio.c drm/i915/audio: pass intel_encoder on to platform specific ELD functions 2014-11-04 23:21:58 +01:00
intel_bios.c Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux 2014-10-14 09:39:08 +02:00
intel_bios.h drm/i915/bios: add missing __packed to structs used for reading vbt 2014-09-19 14:43:14 +02:00
intel_crt.c drm/i915: Don't claim that we're resetting PCH ADPA register 2014-10-24 16:34:10 +02:00
intel_ddi.c drm/i915: pass intel_encoder to intel_write_eld 2014-11-04 23:21:57 +01:00
intel_display.c drm/i915: Initialize new chv primary plane and pipe blender registers 2014-11-04 23:22:09 +01:00
intel_dp_mst.c drm/i915: Fold in intel_mst_port_dp_detect 2014-10-24 16:34:12 +02:00
intel_dp.c drm/i915: Make sure DPLL is enabled when kicking the power sequencer on VLV/CHV 2014-11-04 23:22:06 +01:00
intel_drv.h drm/i915: Make sure DPLL is enabled when kicking the power sequencer on VLV/CHV 2014-11-04 23:22:06 +01:00
intel_dsi_cmd.c drm/i915: Align intel_dsi*.c files a bit 2014-08-08 17:43:45 +02:00
intel_dsi_cmd.h
intel_dsi_panel_vbt.c drm/i915: Add support for Video Burst Mode for MIPI DSI 2014-08-08 17:43:45 +02:00
intel_dsi_pll.c drm/i915: Align intel_dsi*.c files a bit 2014-08-08 17:43:45 +02:00
intel_dsi.c drm/i915: Bikeshed rpm functions name a bit. 2014-10-01 10:52:59 +02:00
intel_dsi.h drm/i915: Add support for Video Burst Mode for MIPI DSI 2014-08-08 17:43:45 +02:00
intel_dvo.c drm/i915: Don't call DVO mode_set hook on DPMS changes 2014-09-03 11:05:14 +02:00
intel_fbdev.c drm/i915: make fbdev initialization asynchronous v2 2014-09-03 11:05:01 +02:00
intel_fifo_underrun.c drm/i915: kerneldoc for intel_fifo_underrun.c 2014-10-24 16:33:55 +02:00
intel_frontbuffer.c drm/i915: spelling fixes for frontbuffer tracking kerneldoc 2014-10-01 10:52:57 +02:00
intel_hdmi.c drm/i915: pass intel_encoder to intel_write_eld 2014-11-04 23:21:57 +01:00
intel_i2c.c
intel_lrc.c drm/i915: Fix irq checks in ring->irq_get/put functions 2014-09-19 14:43:13 +02:00
intel_lrc.h drm/i915/bdw: Render state init for Execlists 2014-09-03 11:04:52 +02:00
intel_lvds.c drm/i915: Bikeshed rpm functions name a bit. 2014-10-01 10:52:59 +02:00
intel_modes.c
intel_opregion.c ACPI / i915: Update the condition to ignore firmware backlight change request 2014-09-30 01:11:18 +02:00
intel_overlay.c
intel_panel.c drm/i915: spt does not have pch backlight override bit 2014-10-24 16:34:09 +02:00
intel_pm.c drm/i915/chv: Use 16 and 32 for low and high drain latency precision. 2014-10-24 16:34:12 +02:00
intel_renderstate_gen6.c
intel_renderstate_gen7.c
intel_renderstate_gen8.c drm/i915 Update Gen8 golden context batch buffer 2014-11-04 14:04:54 +01:00
intel_renderstate_gen9.c drm/i915 Add golden context support for Gen9 2014-11-04 14:04:55 +01:00
intel_renderstate.h drm/i915 Add golden context support for Gen9 2014-11-04 14:04:55 +01:00
intel_ringbuffer.c Merge tag 'drm-intel-next-2014-10-24' of git://anongit.freedesktop.org/drm-intel into drm-next 2014-11-04 07:36:06 +10:00
intel_ringbuffer.h drm/i915/bdw: Apply workarounds in render ring init function 2014-09-03 11:04:42 +02:00
intel_runtime_pm.c drm/i915: Do vlv cmnlane toggle w/a in more cases 2014-11-04 23:22:08 +01:00
intel_sdvo_regs.h
intel_sdvo.c
intel_sideband.c
intel_sprite.c drm/i915: Add support for CHV pipe B sprite CSC 2014-11-04 23:22:10 +01:00
intel_tv.c drm/i915: Clarify irq_lock locking, intel_tv_detect 2014-09-19 14:43:19 +02:00
intel_uncore.c drm/i915: check for GT faults in all resume handlers and driver load time 2014-10-24 16:34:18 +02:00
Kconfig
Makefile drm/i915: add new intel audio file to group DP/HDMI audio 2014-11-04 23:21:56 +01:00