Alex Deucher 2fde24e4dc drm/amdgpu/atomfirmware: update to latest integratedinfotable ... Used for renoir. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-07-02 12:02:57 -04:00
..
asic_reg	drm amdgpu: SI UVD registers	2020-07-01 01:59:24 -04:00
ivsrcid	drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2)	2020-06-03 13:52:03 -04:00
amd_acpi.h
amd_pcie_helpers.h
amd_pcie.h
amd_shared.h	drm/amdgpu: add apu flags (v2)	2020-05-22 13:41:53 -04:00
arct_ip_offset.h
atom-bits.h
atom-names.h
atom-types.h
atombios.h
atomfirmware.h	drm/amdgpu/atomfirmware: update to latest integratedinfotable	2020-07-02 12:02:57 -04:00
atomfirmwareid.h
cgs_common.h	drm/amdgpu: retire indirect mmio reg support from cgs	2020-04-09 10:43:18 -04:00
cik_structs.h
discovery.h	drm/amdgpu/discovery: reserve discovery data at the top of VRAM	2019-10-15 15:48:46 -04:00
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h	drm/amdkfd: Consolidate duplicated bo alloc flags	2020-03-10 15:54:34 -04:00
kgd_pp_interface.h	drm/amd/powerplay: support xgmi pstate setting on powerplay routine V2	2019-11-06 16:27:46 -05:00
navi10_enum.h
navi10_ip_offset.h
navi12_ip_offset.h
navi14_ip_offset.h
pptable.h
renoir_ip_offset.h	drm/amd/display: Add DCN_BASE regs	2019-10-17 16:27:27 -04:00
sienna_cichlid_ip_offset.h	drm/amdgpu: initialize IP offset for sienna_cichlid (v2)	2020-06-03 13:52:00 -04:00
soc15_hw_ip.h
soc15_ih_clientid.h	drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid	2020-06-03 13:52:04 -04:00
v9_structs.h
v10_structs.h
vega10_enum.h	drm/amdgpu: Support new arcturus mtype	2019-09-13 17:35:48 -05:00
vega10_ip_offset.h
vega20_ip_offset.h
vi_structs.h