Dan Carpenter 5556b9fed1 drm/amd/powerplay: Fix an off by one in navi10_get_smu_msg_index() ... The navi10_message_map[] array has SMU_MSG_MAX_COUNT elements so the ">" has to be changed to ">=" to prevent reading one element beyond the end of the array. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-08-27 08:16:08 -05:00
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hwmgr	drm/amdgpu/powerplay/vega10: enable mclk switching if monitors are synced	2019-08-23 11:31:45 -05:00
inc	drm/amd/powerplay: add DPMCLOCKS table implementation	2019-08-22 17:38:05 -05:00
smumgr	drm/amd/powerplay: guard consistency between CPU copy and local VRAM	2019-08-02 10:30:39 -05:00
amd_powerplay.c	drm/amd/poweplay: Add amd_pm_funcs callback for mode 2	2019-08-15 11:00:30 -05:00
amdgpu_smu.c	drm/amd/powerplay: Disable renoir smu feature retrieve for the moment	2019-08-22 17:48:23 -05:00
arcturus_ppt.c	drm/amd/powerplay: correct typo	2019-08-21 22:17:57 -05:00
arcturus_ppt.h	drm/amd/powerplay: update arcturus_ppt.c/h V3	2019-07-30 23:48:33 -05:00
Makefile	drm/amdgpu/powerplay: add smu ip block for renoir (v2)	2019-08-22 17:36:58 -05:00
navi10_ppt.c	drm/amd/powerplay: Fix an off by one in navi10_get_smu_msg_index()	2019-08-27 08:16:08 -05:00
navi10_ppt.h	drm/amd/powerplay: custom peak clock freq for navi10	2019-07-22 14:57:06 -05:00
renoir_ppt.c	drm/amd/powerplay: add DPMCLOCKS table implementation	2019-08-22 17:38:05 -05:00
renoir_ppt.h	drm/amdgpu/powerplay: add initial renoir_ppt.c for renoir (v3)	2019-08-22 17:36:48 -05:00
smu_v11_0.c	drm/amd/powerplay: add DPMCLOCKS table implementation	2019-08-22 17:38:05 -05:00
smu_v12_0.c	drm/amd/powerplay: add DPMCLOCKS table implementation	2019-08-22 17:38:05 -05:00
vega20_ppt.c	drm/powerplay: Fix Vega20 power reading again	2019-08-23 11:31:16 -05:00
vega20_ppt.h	drm/amd/powerplay: simplified od_settings for each asic	2019-06-21 18:59:32 -05:00