linux_dsm_epyc7002/arch/arm64/kvm/hyp
Marc Zyngier 6840bdd73d arm64: KVM: Use per-CPU vector when BP hardening is enabled
Now that we have per-CPU vectors, let's plug then in the KVM/arm64 code.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-01-08 18:46:56 +00:00
..
debug-sr.c arm64: sysreg: Move SPE registers and PSB into common header files 2017-10-18 12:53:32 +01:00
entry.S arm64: KVM: Handle async aborts delivered while at EL2 2016-09-08 12:53:00 +02:00
fpsimd.S arm64: KVM: Implement fpsimd save/restore 2015-12-14 11:30:41 +00:00
hyp-entry.S arm64: KVM: Convert __cpu_reset_hyp_mode to using __hyp_reset_vectors 2017-04-09 07:49:22 -07:00
Makefile Fixes for interrupt controller emulation in ARM/ARM64 and x86, plus a one-liner 2017-11-04 11:44:55 -07:00
s2-setup.c arm64: limit PA size to supported range 2017-12-22 17:34:52 +00:00
switch.c arm64: KVM: Use per-CPU vector when BP hardening is enabled 2018-01-08 18:46:56 +00:00
sysreg-sr.c arm64: KVM: VHE: Context switch MDSCR_EL1 2016-07-23 18:07:12 +02:00
tlb.c arm64: KVM: Add support for VPIPT I-caches 2017-03-20 16:25:45 +00:00