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e7ef0b632e
The EXYNOS5410 clocks are statically listed and registered using the Samsung specific common clock helper functions. Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com> Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
46 lines
1.3 KiB
Plaintext
46 lines
1.3 KiB
Plaintext
* Samsung Exynos5410 Clock Controller
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The Exynos5410 clock controller generates and supplies clock to various
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controllers within the Exynos5410 SoC.
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Required Properties:
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- compatible: should be "samsung,exynos5410-clock"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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All available clocks are defined as preprocessor macros in
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dt-bindings/clock/exynos5410.h header and can be used in device
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tree sources.
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External clock:
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There is clock that is generated outside the SoC. It
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is expected that it is defined using standard clock bindings
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with following clock-output-name:
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- "fin_pll" - PLL input clock from XXTI
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Example 1: An example of a clock controller node is listed below.
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clock: clock-controller@0x10010000 {
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compatible = "samsung,exynos5410-clock";
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reg = <0x10010000 0x30000>;
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#clock-cells = <1>;
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};
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Example 2: UART controller node that consumes the clock generated by the clock
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controller. Refer to the standard clock bindings for information
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about 'clocks' and 'clock-names' property.
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serial@12C20000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C00000 0x100>;
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interrupts = <0 51 0>;
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clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
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clock-names = "uart", "clk_uart_baud0";
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};
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