mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
b06eb0173e
The SOC interrupt controller driver for the Abilis Systems TB10x series of SOCs based on ARC700 CPUs. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: devicetree-discuss@lists.ozlabs.org Link: http://lkml.kernel.org/r/1372177797-9458-1-git-send-email-christian.ruppert@abilis.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
39 lines
1.3 KiB
Plaintext
39 lines
1.3 KiB
Plaintext
TB10x Top Level Interrupt Controller
|
|
====================================
|
|
|
|
The Abilis TB10x SOC contains a custom interrupt controller. It performs
|
|
one-to-one mapping of external interrupt sources to CPU interrupts and
|
|
provides support for reconfigurable trigger modes.
|
|
|
|
Required properties
|
|
-------------------
|
|
|
|
- compatible: Should be "abilis,tb10x-ictl"
|
|
- reg: specifies physical base address and size of register range.
|
|
- interrupt-congroller: Identifies the node as an interrupt controller.
|
|
- #interrupt cells: Specifies the number of cells used to encode an interrupt
|
|
source connected to this controller. The value shall be 2.
|
|
- interrupt-parent: Specifies the parent interrupt controller.
|
|
- interrupts: Specifies the list of interrupt lines which are handled by
|
|
the interrupt controller in the parent controller's notation. Interrupts
|
|
are mapped one-to-one to parent interrupts.
|
|
|
|
Example
|
|
-------
|
|
|
|
intc: interrupt-controller { /* Parent interrupt controller */
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>; /* For example below */
|
|
/* ... */
|
|
};
|
|
|
|
tb10x_ictl: pic@2000 { /* TB10x interrupt controller */
|
|
compatible = "abilis,tb10x-ictl";
|
|
reg = <0x2000 0x20>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
|
|
20 21 22 23 24 25 26 27 28 29 30 31>;
|
|
};
|