David Abdurachmanov 5340627e3f riscv: add support for SECCOMP and SECCOMP_FILTER ... This patch was extensively tested on Fedora/RISCV (applied by default on top of 5.2-rc7 kernel for <2 months). The patch was also tested with 5.3-rc on QEMU and SiFive Unleashed board. libseccomp (userspace) was rebased: https://github.com/seccomp/libseccomp/pull/134 Fully passes libseccomp regression testing (simulation and live). There is one failing kernel selftest: global.user_notification_signal v1 -> v2: - return immediately if secure_computing(NULL) returns -1 - fixed whitespace issues - add missing seccomp.h - remove patch #2 (solved now) - add riscv to seccomp kernel selftest Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Cc: keescook@chromium.org Cc: me@carlosedp.com Tested-by: Carlos de Paula <me@carlosedp.com> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/linux-riscv/CAEn-LTp=ss0Dfv6J00=rCAy+N78U2AmhqJNjfqjr2FDpPYjxEQ@mail.gmail.com/ Link: https://lore.kernel.org/linux-riscv/CAJr-aD=UnCN9E_mdVJ2H5nt=6juRSWikZnA5HxDLQxXLbsRz-w@mail.gmail.com/ [paul.walmsley@sifive.com: cleaned up Cc: lines; fixed spelling and checkpatch issues; updated to apply] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>		2019-10-29 11:32:10 -07:00
..
asm-offsets.h
asm-prototypes.h
asm.h	RISC-V: Clear load reservations while restoring hart contexts	2019-10-01 13:16:40 -07:00
atomic.h
barrier.h
bitops.h
bug.h	riscv: cleanup <asm/bug.h>	2019-10-23 14:53:46 -07:00
cache.h
cacheflush.h	riscv: fix build break after macro-to-function conversion in generic cacheflush.h	2019-07-18 08:16:56 -07:00
cmpxchg.h
csr.h
current.h
delay.h
elf.h
fence.h
fixmap.h	RISC-V: Fix FIXMAP area corruption on RV32 systems	2019-08-28 15:30:12 -07:00
ftrace.h
futex.h
hugetlb.h
hwcap.h
image.h	riscv: modify the Image header to improve compatibility with the ARM64 header	2019-09-13 19:03:52 -07:00
io.h	RISC-V: Add PCIe I/O BAR memory mapping	2019-10-28 10:43:32 -07:00
irq.h	riscv: add missing header file includes	2019-10-28 00:46:01 -07:00
irqflags.h
Kbuild	riscv: include generic support for MSI irqdomains	2019-07-22 13:06:07 -07:00
kprobes.h
linkage.h
mmiowb.h
mmu_context.h
mmu.h
module.h
page.h	RISC-V: Implement sparsemem	2019-08-30 11:10:37 -07:00
pci.h
perf_event.h
pgalloc.h	mm: treewide: clarify pgtable_page_{ctor,dtor}() naming	2019-09-26 10:10:44 -07:00
pgtable-32.h
pgtable-64.h
pgtable-bits.h
pgtable.h	RISC-V: Add PCIe I/O BAR memory mapping	2019-10-28 10:43:32 -07:00
processor.h
ptrace.h
sbi.h
seccomp.h	riscv: add support for SECCOMP and SECCOMP_FILTER	2019-10-29 11:32:10 -07:00
sifive_l2_cache.h
smp.h	riscv: cleanup riscv_cpuid_to_hartid_mask	2019-09-05 01:51:57 -07:00
sparsemem.h	RISC-V: Implement sparsemem	2019-08-30 11:10:37 -07:00
spinlock_types.h
spinlock.h
string.h
switch_to.h	riscv: add missing header file includes	2019-10-28 00:46:01 -07:00
syscall.h
thread_info.h	riscv: add support for SECCOMP and SECCOMP_FILTER	2019-10-29 11:32:10 -07:00
timex.h	riscv: don't use the rdtime(h) pseudo-instructions	2019-09-05 01:52:46 -07:00
tlb.h
tlbflush.h	riscv: tlbflush: remove confusing comment on local_flush_tlb_all()	2019-10-14 12:35:36 -07:00
uaccess.h
unistd.h
vdso.h
word-at-a-time.h