mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 12:55:09 +07:00
0220dcd113
*) Add a new driver to support Armada 3700 COMPHY IP (supports SATA, USB3, PCIe) *) Add a new driver to support Armada UTMI PHY *) Add a new driver to support Cadence D-PHY *) Extend omap-usb2 PHY driver to be used for AM654 USB2 PHY *) Extend qcom-qmp PHY driver to be used for UFS PHY and USB3 PHY in Qualcomm MSM8998 *) Extend qcom-qusb2 PHY driver to support QUSB2 PHY in Qualcomm MSM8998 *) Remove module specific code that is present for drivers that can be only built-in *) Allow Freescale IMX8MQ USB to be used for multiple SoCs and not just i.MX8MQ *) Cleanups such as switch to SPDX identifier, use readl_poll_timeout macro, remove unused headers etc., Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEEUXMr/TfP2p4suIY5Dlx4XIBNgtkFAlxiwzIOHGtpc2hvbkB0 aS5jb20ACgkQDlx4XIBNgtnxAQ/+Lb12tqZImrTm5A+KIvk3Kaq47TC0dwsNbfg4 Y8VWEAXP3Qicrc8uRxJDQdN2Jztf681kBOmTpa+RopwiaWTPQ/62MGTWOWIJHAoz LLXUo4FYF/bWDpszAh9CrVQVzZ6K6kq33fnLnJaYtYt0zyZS3pHnClApUgT+Ahz3 2HW1M/XPKHJYyNH5N1lCqiGdOQM4aKYn9sy+AlxWN9XCWLKA1W9hxzF+wcIH7RAB VCixtug8PJ4D2XMyN6SzF99N4OWEmsoES3PC/28/kMs6JfwPUcFTCFYOhE1i+g0l rF1b7nvhxXpw6PYG4Ub/O/ltIyU+0ll2sFT3nm6gEbNPbl3FeDlDNXGQupMwHvB7 N0DPVDZ9w0Xru6FzWQFcmW2PHbauCtTTYv6t+RxmdwtN4ituXwwxoO/xz4Ah1bTL Aqvt162uEWdCgqeW/nbq3b9MDITLnBbQ5pevsboaRj/GHXcF9K6D0oFsuWLb56KQ PzxulrPToBTWxbOyThA8CV1QI79re9Sd+05Niptg33vTAAw4Oh9+wKeqO8ZYPrvK gb2n5SEZIiZgcevA6M3Iy7GiWJ1Zg3p+uQxhBp39cKQsZbl6BtqXtOeG11wm2xOu g7D6vntoNMz+wj08/qemHgttrcJ5P8RA5k4PFZIMyCaJgK9Z5vTQH8zOfja4qefG LWC+U6Q= =wNhh -----END PGP SIGNATURE----- Merge tag 'phy-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 5.1 *) Add a new driver to support Armada 3700 COMPHY IP (supports SATA, USB3, PCIe) *) Add a new driver to support Armada UTMI PHY *) Add a new driver to support Cadence D-PHY *) Extend omap-usb2 PHY driver to be used for AM654 USB2 PHY *) Extend qcom-qmp PHY driver to be used for UFS PHY and USB3 PHY in Qualcomm MSM8998 *) Extend qcom-qusb2 PHY driver to support QUSB2 PHY in Qualcomm MSM8998 *) Remove module specific code that is present for drivers that can be only built-in *) Allow Freescale IMX8MQ USB to be used for multiple SoCs and not just i.MX8MQ *) Cleanups such as switch to SPDX identifier, use readl_poll_timeout macro, remove unused headers etc., Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (32 commits) phy: qcom-qmp: Add QMP UFS PHY support for msm8998 dt-bindings: phy-qcom-qmp: Add qcom,msm8998-qmp-ufs-phy phy: bcm-sr-pcie: Change operation when PIPEMUX=1 phy: Add Cadence D-PHY support dt-bindings: phy: Move the Cadence D-PHY bindings phy: dphy: Clarify lanes parameter documentation phy: dphy: Change units of wakeup and init parameters phy: dphy: Remove unused header MAINTAINERS: phy: fill Armada 3700 PHY drivers entry dt-bindings: phy: mvebu-utmi: add UTMI PHY bindings phy: add A3700 UTMI PHY driver MAINTAINERS: phy: add entry for Armada 3700 COMPHY driver dt-bindings: phy: mvebu-comphy: extend the file to describe a3700 bindings phy: add A3700 COMPHY support phy: mvebu-cp110-comphy: fix port check in ->xlate() phy: armada375-usb2: switch to SPDX license identifier phy: make phy-armada375-usb2 explicitly non-modular phy: make phy-mvebu-sata explicitly non-modular phy: make phy-core explicitly non-modular phy: qcom-qusb2: Add QUSB2 PHY support for msm8998 ...
88 lines
2.6 KiB
Plaintext
88 lines
2.6 KiB
Plaintext
#
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# Phy drivers for TI platforms
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#
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config PHY_DA8XX_USB
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tristate "TI DA8xx USB PHY Driver"
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depends on ARCH_DAVINCI_DA8XX
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select GENERIC_PHY
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select MFD_SYSCON
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help
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Enable this to support the USB PHY on DA8xx SoCs.
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This driver controls both the USB 1.1 PHY and the USB 2.0 PHY.
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config PHY_DM816X_USB
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tristate "TI dm816x USB PHY driver"
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depends on ARCH_OMAP2PLUS
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depends on USB_SUPPORT
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select GENERIC_PHY
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select USB_PHY
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help
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Enable this for dm816x USB to work.
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config OMAP_CONTROL_PHY
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tristate "OMAP CONTROL PHY Driver"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
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help
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Enable this to add support for the PHY part present in the control
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module. This driver has API to power on the USB2 PHY and to write to
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the mailbox. The mailbox is present only in omap4 and the register to
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power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
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additional register to power on USB3 PHY/SATA PHY/PCIE PHY
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(PIPE3 PHY).
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config OMAP_USB2
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tristate "OMAP USB2 PHY Driver"
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depends on ARCH_OMAP2PLUS || ARCH_K3
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depends on USB_SUPPORT
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select GENERIC_PHY
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select USB_PHY
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select OMAP_CONTROL_PHY if ARCH_OMAP2PLUS
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help
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Enable this to support the transceiver that is part of SOC. This
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driver takes care of all the PHY functionality apart from comparator.
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The USB OTG controller communicates with the comparator using this
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driver.
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config TI_PIPE3
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tristate "TI PIPE3 PHY Driver"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
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select GENERIC_PHY
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select OMAP_CONTROL_PHY
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help
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Enable this to support the PIPE3 PHY that is part of TI SOCs. This
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driver takes care of all the PHY functionality apart from comparator.
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This driver interacts with the "OMAP Control PHY Driver" to power
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on/off the PHY.
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config PHY_TUSB1210
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tristate "TI TUSB1210 ULPI PHY module"
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depends on USB_ULPI_BUS
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select GENERIC_PHY
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help
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Support for TI TUSB1210 USB ULPI PHY.
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config TWL4030_USB
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tristate "TWL4030 USB Transceiver Driver"
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depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
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depends on USB_SUPPORT
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depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, this can't 'y'
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select GENERIC_PHY
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select USB_PHY
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help
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Enable this to support the USB OTG transceiver on TWL4030
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family chips (including the TWL5030 and TPS659x0 devices).
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This transceiver supports high and full speed devices plus,
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in host mode, low speed.
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config PHY_TI_GMII_SEL
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tristate
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default y if TI_CPSW=y
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depends on TI_CPSW || COMPILE_TEST
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select GENERIC_PHY
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select REGMAP
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default m
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help
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This driver supports configuring of the TI CPSW Port mode depending on
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the Ethernet PHY connected to the CPSW Port.
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