mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 16:45:25 +07:00
0acbfc66d0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
77 lines
1.8 KiB
C
77 lines
1.8 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
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* Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
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*
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*/
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#ifndef __ASM_MACH_ATH25_DMA_COHERENCE_H
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#define __ASM_MACH_ATH25_DMA_COHERENCE_H
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#include <linux/device.h>
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/*
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* We need some arbitrary non-zero value to be programmed to the BAR1 register
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* of PCI host controller to enable DMA. The same value should be used as the
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* offset to calculate the physical address of DMA buffer for PCI devices.
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*/
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#define AR2315_PCI_HOST_SDRAM_BASEADDR 0x20000000
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static inline dma_addr_t ath25_dev_offset(struct device *dev)
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{
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#ifdef CONFIG_PCI
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extern struct bus_type pci_bus_type;
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if (dev && dev->bus == &pci_bus_type)
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return AR2315_PCI_HOST_SDRAM_BASEADDR;
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#endif
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return 0;
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}
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static inline dma_addr_t
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plat_map_dma_mem(struct device *dev, void *addr, size_t size)
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{
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return virt_to_phys(addr) + ath25_dev_offset(dev);
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}
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static inline dma_addr_t
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plat_map_dma_mem_page(struct device *dev, struct page *page)
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{
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return page_to_phys(page) + ath25_dev_offset(dev);
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}
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static inline unsigned long
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plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
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{
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return dma_addr - ath25_dev_offset(dev);
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}
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static inline void
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plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline int plat_dma_supported(struct device *dev, u64 mask)
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{
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return 1;
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}
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static inline int plat_device_is_coherent(struct device *dev)
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{
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#ifdef CONFIG_DMA_COHERENT
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return 1;
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#endif
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#ifdef CONFIG_DMA_NONCOHERENT
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return 0;
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#endif
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}
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static inline void plat_post_dma_flush(struct device *dev)
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{
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}
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#endif /* __ASM_MACH_ATH25_DMA_COHERENCE_H */
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