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MIPS: DMA: Implement platform hook to perform post-DMA cache flushes.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2015-03-27 15:10:30 +01:00
parent 2530738013
commit 0acbfc66d0
9 changed files with 35 additions and 1 deletions
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4
arch/mips/include/asm/mach-ath25/dma-coherence.h
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@ -69,4 +69,8 @@ static inline int plat_device_is_coherent(struct device *dev)
#endif
}
static inline void plat_post_dma_flush(struct device *dev)
{
}
#endif /* __ASM_MACH_ATH25_DMA_COHERENCE_H */

4
arch/mips/include/asm/mach-bmips/dma-coherence.h
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@ -45,4 +45,8 @@ static inline int plat_device_is_coherent(struct device *dev)
return 0;
}
static inline void plat_post_dma_flush(struct device *dev)
{
}
#endif /* __ASM_MACH_BMIPS_DMA_COHERENCE_H */

4
arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
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@ -57,6 +57,10 @@ static inline int plat_device_is_coherent(struct device *dev)
return 1;
}
static inline void plat_post_dma_flush(struct device *dev)
{
}
dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);

4
arch/mips/include/asm/mach-generic/dma-coherence.h
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@ -52,6 +52,10 @@ static inline int plat_device_is_coherent(struct device *dev)
return coherentio;
}
static inline void plat_post_dma_flush(struct device *dev)
{
}
#ifdef CONFIG_SWIOTLB
static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
{

4
arch/mips/include/asm/mach-ip27/dma-coherence.h
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@ -58,6 +58,10 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
return 1;
}
static inline void plat_post_dma_flush(struct device *dev)
{
}
static inline int plat_device_is_coherent(struct device *dev)
{
return 1; /* IP27 non-cohernet mode is unsupported */

4
arch/mips/include/asm/mach-ip32/dma-coherence.h
View File

@ -80,6 +80,10 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
return 1;
}
static inline void plat_post_dma_flush(struct device *dev)
{
}
static inline int plat_device_is_coherent(struct device *dev)
{
return 0; /* IP32 is non-cohernet */

4
arch/mips/include/asm/mach-jazz/dma-coherence.h
View File

@ -48,6 +48,10 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
return 1;
}
static inline void plat_post_dma_flush(struct device *dev)
{
}
static inline int plat_device_is_coherent(struct device *dev)
{
return 0;

4
arch/mips/include/asm/mach-loongson/dma-coherence.h
View File

@ -78,4 +78,8 @@ static inline int plat_device_is_coherent(struct device *dev)
#endif /* CONFIG_DMA_NONCOHERENT */
}
static inline void plat_post_dma_flush(struct device *dev)
{
}
#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */

4
arch/mips/mm/dma-default.c
View File

@ -258,7 +258,7 @@ static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
if (cpu_needs_post_dma_flush(dev))
__dma_sync(dma_addr_to_page(dev, dma_addr),
dma_addr & ~PAGE_MASK, size, direction);
plat_post_dma_flush(dev);
plat_unmap_dma_mem(dev, dma_addr, size, direction);
}
@ -312,6 +312,7 @@ static void mips_dma_sync_single_for_cpu(struct device *dev,
if (cpu_needs_post_dma_flush(dev))
__dma_sync(dma_addr_to_page(dev, dma_handle),
dma_handle & ~PAGE_MASK, size, direction);
plat_post_dma_flush(dev);
}
static void mips_dma_sync_single_for_device(struct device *dev,
@ -331,6 +332,7 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev,
for (i = 0; i < nelems; i++, sg++)
__dma_sync(sg_page(sg), sg->offset, sg->length,
direction);
plat_post_dma_flush(dev);
}
static void mips_dma_sync_sg_for_device(struct device *dev,