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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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99935a7a59
For intel systems with multi IOH, we should read peer root resources directly from PCI config space, and don't trust _CRS. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
27 lines
638 B
C
27 lines
638 B
C
#ifdef CONFIG_X86_64
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/*
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* sub bus (transparent) will use entres from 3 to store extra from
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* root, so need to make sure we have enought slot there, Should we
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* increase PCI_BUS_NUM_RESOURCES?
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*/
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#define RES_NUM 16
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struct pci_root_info {
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char name[12];
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unsigned int res_num;
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struct resource res[RES_NUM];
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int bus_min;
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int bus_max;
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int node;
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int link;
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};
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/* 4 at this time, it may become to 32 */
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#define PCI_ROOT_NR 4
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extern int pci_root_num;
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extern struct pci_root_info pci_root_info[PCI_ROOT_NR];
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extern void update_res(struct pci_root_info *info, size_t start,
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size_t end, unsigned long flags, int merge);
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#endif
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