Andre Przywara 266068eabb KVM: arm/arm64: vgic-v2: Limit ITARGETSR bits to number of VCPUs ... The GICv2 spec says in section 4.3.12 that a "CPU targets field bit that corresponds to an unimplemented CPU interface is RAZ/WI." Currently we allow the guest to write any value in there and it can read that back. Mask the written value with the proper CPU mask to be spec compliant. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		2016-12-09 15:46:59 +00:00
..
arm	KVM: arm/arm64: vgic-v2: Limit ITARGETSR bits to number of VCPUs	2016-12-09 15:46:59 +00:00
async_pf.c	mm: remove write/force parameters from __get_user_pages_unlocked()	2016-10-18 14:13:37 -07:00
async_pf.h
coalesced_mmio.c
coalesced_mmio.h
eventfd.c	KVM: fix OOPS on flush_work	2016-10-26 14:06:51 +02:00
irqchip.c	KVM/ARM Changes for v4.8 - Take 2	2016-08-04 13:59:56 +02:00
Kconfig	KVM: remove kvm_vcpu_compatible	2016-06-16 00:05:00 +02:00
kvm_main.c	One NULL pointer dereference, and two fixes for regressions introduced	2016-11-04 13:08:05 -07:00
vfio.c
vfio.h